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PZT3906T1/D

型号：

PZT3906T1/D

描述：

PZT3906T1数据表\n[ PZT3906T1 Data Sheet ]

品牌：

ETC[ ETC ]

页数：

10 页

PDF大小：

117 K

下载PDF手册
PZT3906T1  
Preferred Device  
General Purpose Transistor  
PNP Silicon  
MAXIMUM RATINGS  
http://onsemi.com  
Rating  
Collector - Emitter Voltage  
Collector - Base Voltage  
Symbol Value  
Unit  
Vdc  
V
V
V
-40  
-40  
CEO  
CBO  
EBO  
COLLECTOR  
2, 4  
Vdc  
Emitter - Base Voltage  
-5.0  
-200  
Vdc  
Collector Current - Continuous  
THERMAL CHARACTERISTICS  
Characteristic  
I
C
mAdc  
1
BASE  
Symbol  
Max  
Unit  
3
EMITTER  
Total Device Dissipation FR- 5 Board  
P
D
225  
mW  
(Note 1) T = 25°C  
Derate above 25°C  
A
1.8  
556  
300  
mW/°C  
°C/W  
mW  
MARKING  
DIAGRAM  
Thermal Resistance Junction to Ambient  
Total Device Dissipation  
R
q
JA  
P
D
Alumina Substrate, (Note 2) T = 25°C  
Derate above 25°C  
A
2.4  
mW/°C  
°C/W  
°C  
SOT-223  
CASE 318E  
Style 1  
Thermal Resistance Junction to Ambient  
Junction and Storage Temperature  
R
417  
q
JA  
2A  
T , T  
J
- 55 to  
+150  
stg  
1. FR- 5 = 1.0 ꢀ 0.75 ꢀ 0.062 in.  
2. Alumina = 0.4 ꢀ 0.3 ꢀ 0.024 in. 99.5% alumina.  
2A  
= Specific Device Code  
ORDERING INFORMATION  
Device  
Package  
Shipping  
1000 / Tape & Reel  
PZT3906T1  
SOT-223  
Preferred devices are recommended choices for future use  
and best overall value.  
Semiconductor Components Industries, LLC, 2003  
1
Publication Order Number:  
June, 2003 - Rev. 0  
PZT3906T1/D  
PZT3906T1  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)  
A
Characteristic  
OFF CHARACTERISTICS (Note 3)  
Symbol  
Min  
Max  
Unit  
Collector - Emitter Breakdown Voltage (Note 3)  
V
Vdc  
(BR)CEO  
(BR)CBO  
(BR)EBO  
(I = -1.0 mAdc, I = 0)  
-40  
-40  
-5.0  
-
-
-
C
B
Collector - Base Breakdown Voltage  
(I = -10 mAdc, I = 0)  
V
V
C
E
Emitter - Base Breakdown Voltage  
(I = -10 mAdc, I = 0)  
-
E
C
Base Cutoff Current  
(V = -30 Vdc, V = -3.0 Vdc)  
I
BL  
nAdc  
-50  
-50  
CE  
EB  
Collector Cutoff Current  
(V = -30 Vdc, V = -3.0 Vdc)  
I
CEX  
-
CE  
EB  
ON CHARACTERISTICS (Note 3)  
DC Current Gain  
H
-
FE  
(I = -0.1 mAdc, V = -1.0 Vdc)  
60  
80  
-
-
C
CE  
(I = -1.0 mAdc, V = -1.0 Vdc)  
C
CE  
(I = -10 mAdc, V = -1.0 Vdc)  
100  
60  
300  
-
C
CE  
(I = -50 mAdc, V = -1.0 Vdc)  
C
CE  
(I = -100 mAdc, V = -1.0 Vdc)  
30  
-
C
CE  
Collector - Emitter Saturation Voltage  
(I = -10 mAdc, I = -1.0 mAdc)  
V
Vdc  
CE(sat)  
-
-
-0.25  
-0.4  
C
B
(I = -50 mAdc, I = -5.0 mAdc)  
C
B
Base - Emitter Saturation Voltage  
(I = -10 mAdc, I = -1.0 mAdc)  
V
BE(sat)  
-0.65  
-
-0.85  
-0.95  
C
B
(I = -50 mAdc, I = -5.0 mAdc)  
C
B
SMALL- SIGNAL CHARACTERISTICS  
Current - Gain - Bandwidth Product  
f
MHz  
pF  
T
(I = -10 mAdc, V = -20 Vdc, f = 100 MHz)  
250  
-
-
C
CE  
Output Capacitance  
C
obo  
(V = -5.0 Vdc, I = 0, f = 1.0 MHz)  
4.5  
10  
CB  
E
Input Capacitance  
C
ibo  
(V = -0.5 Vdc, I = 0, f = 1.0 MHz)  
-
EB  
C
Input Impedance  
(I = -1.0 mAdc, V = -10 Vdc, f = 1.0 kHz)  
C
h
kW  
ie  
re  
fe  
2.0  
0.1  
100  
3.0  
-
12  
CE  
- 4  
Voltage Feedback Ratio  
(I = -1.0 mAdc, V = -10 Vdc, f = 1.0 kHz)  
h
h
X 10  
-
10  
C
CE  
Small - Signal Current Gain  
(I = -1.0 mAdc, V = -10 Vdc, f = 1.0 kHz)  
C
400  
60  
CE  
Output Admittance  
(I = -1.0 mAdc, V = -10 Vdc, f = 1.0 kHz)  
C
h
oe  
mmhos  
dB  
CE  
Noise Figure  
NF  
(I = -100 mAdc, V = -5.0 Vdc, R = 1.0 kW, f = 1.0 kHz)  
C
4.0  
CE  
S
SWITCHING CHARACTERISTICS  
Delay Time  
t
t
-
-
-
-
35  
35  
d
(V = -3.0 Vdc, V = 0.5 Vdc,  
CC  
BE  
I
C
= -10 mAdc, I = -1.0 mAdc)  
B1  
Rise Time  
t
r
ns  
Storage Time  
225  
75  
s
(V = -3.0 Vdc, I = -10 mAdc,  
CC  
C
I
B1  
= I = -1.0 mAdc)  
B2  
Fall Time  
t
f
3. Pulse Width ≤ 300 ms, Duty Cycle ≤ 2.0%.  
http://onsemi.com  
2
PZT3906T1  
3 V  
3 V  
< 1 ns  
+9.1 V  
275  
275  
< 1 ns  
+0.5 V  
10 k  
10 k  
0
C < 4 pF*  
S
C < 4 pF*  
S
1N916  
10.6 V  
300 ns  
10 < t < 500 ms  
1
t
1
10.9 V  
DUTY CYCLE = 2%  
DUTY CYCLE = 2%  
* Total shunt capacitance of test jig and connectors  
Figure 1. Delay and Rise Time  
Equivalent Test Circuit  
Figure 2. Storage and Fall Time  
Equivalent Test Circuit  
http://onsemi.com  
3
PZT3906T1  
TYPICAL TRANSIENT CHARACTERISTICS  
T = 25°C  
J
T = 125°C  
J
10  
5000  
V
CC  
I /I = 10  
= 40 V  
3000  
2000  
7.0  
C B  
C
5.0  
obo  
1000  
700  
C
ibo  
500  
3.0  
2.0  
300  
200  
Q
T
Q
A
100  
70  
1.0  
0.1  
50  
0.2 0.3 0.5 0.7 1.0  
2.0 3.0 5.0 7.0 10  
20 30 40  
1.0  
2.0 3.0 5.0 7.0 10  
20 30 50 70 100  
200  
REVERSE BIAS (VOLTS)  
I , COLLECTOR CURRENT (mA)  
C
Figure 3. Capacitance  
Figure 4. Charge Data  
500  
500  
I /I = 10  
C B  
V
= 40 V  
CC  
300  
200  
300  
200  
I = I  
B1 B2  
I /I = 20  
C B  
100  
70  
100  
70  
t @ V = 3.0 V  
r CC  
50  
50  
15 V  
30  
20  
30  
20  
I /I = 10  
C B  
40 V  
10  
10  
2.0 V  
7
5
7
5
t @ V = 0 V  
OB  
d
1.0  
2.0 3.0 5.0 7.0 10  
20 30 50 70 100  
200  
200  
1.0  
2.0 3.0 5.0 7.0 10  
20 30 50  
70 100  
I , COLLECTOR CURRENT (mA)  
C
I , COLLECTOR CURRENT (mA)  
C
Figure 6. Fall Time  
Figure 5. Turn - On Time  
TYPICAL AUDIO SMALL- SIGNAL CHARACTERISTICS  
NOISE FIGURE VARIATIONS  
(VCE = - 5.0 Vdc, TA = 25°C, Bandwidth = 1.0 Hz)  
5.0  
4.0  
3.0  
2.0  
1.0  
0
12  
SOURCE RESISTANCE = 200 W  
= 1.0 mA  
f = 1.0 kHz  
I
= 1.0 mA  
C
I
C
10  
8
I
C
= 0.5 mA  
SOURCE RESISTANCE = 200 W  
= 0.5 mA  
I
C
SOURCE RESISTANCE = 2.0 k  
= 50 mA  
6
I
C
4
I
= 50 mA  
C
SOURCE RESISTANCE = 2.0 k  
= 100 mA  
I
= 100 mA  
C
2
I
C
0
0.1 0.2  
0.4  
1.0 2.0 4.0  
10  
20  
40  
100  
0.1 0.2  
0.4  
1.0 2.0  
4.0  
10  
20  
40  
100  
f, FREQUENCY (kHz)  
R , SOURCE RESISTANCE (k OHMS)  
g
Figure 7.  
Figure 8.  
http://onsemi.com  
4
PZT3906T1  
h PARAMETERS  
(VCE = - 10 Vdc, f = 1.0 kHz, TA = 25°C)  
300  
200  
100  
70  
50  
30  
20  
100  
70  
10  
7
50  
30  
5
0.1  
0.2 0.3  
0.5 0.7 1.0  
2.0 3.0  
5.0 7.0 10  
0.1  
0.2 0.3  
0.5 0.7 1.0  
2.0 3.0  
5.0 7.0 10  
I , COLLECTOR CURRENT (mA)  
C
I , COLLECTOR CURRENT (mA)  
C
Figure 9. Current Gain  
Figure 10. Output Admittance  
20  
10  
10  
7.0  
5.0  
7.0  
5.0  
3.0  
2.0  
3.0  
2.0  
1.0  
0.7  
0.5  
1.0  
0.7  
0.5  
0.3  
0.2  
0.1  
0.2 0.3  
0.5 0.7 1.0  
2.0 3.0  
5.0 7.0 10  
0.1  
0.2 0.3  
0.5 0.7 1.0  
2.0 3.0  
5.0 7.0 10  
I , COLLECTOR CURRENT (mA)  
C
I , COLLECTOR CURRENT (mA)  
C
Figure 11. Input Impedance  
Figure 12. Voltage Feedback Ratio  
http://onsemi.com  
5
PZT3906T1  
TYPICAL STATIC CHARACTERISTICS  
2.0  
1.0  
T = +125°C  
J
V
CE  
= 1.0 V  
+25°C  
−ꢀ55°C  
0.7  
0.5  
0.3  
0.2  
0.1  
0.1  
0.2  
0.3  
0.5 0.7  
1.0  
2.0  
3.0  
5.0 7.0 10  
20  
30  
50  
70 100  
200  
I , COLLECTOR CURRENT (mA)  
C
Figure 13. DC Current Gain  
1.0  
0.8  
0.6  
0.4  
T = 25°C  
J
I
C
= 1.0 mA  
10 mA  
30 mA  
100 mA  
0.2  
0
0.01  
0.02  
0.03  
0.05 0.07 0.1  
0.2  
0.3  
0.5  
0.7  
1.0  
2.0  
3.0  
5.0  
7.0  
10  
I , BASE CURRENT (mA)  
B
Figure 14. Collector Saturation Region  
1.0  
0.8  
0.6  
1.0  
T = 25°C  
J
V
@ I /I = 10  
BE(sat) C B  
0.5  
0
+25°C TO +125°C  
−ꢀ55°C TO +25°C  
q
FOR V  
CE(sat)  
VC  
V
BE  
@ V = 1.0 V  
CE  
−ꢀ0.5  
−ꢀ1.0  
+25°C TO +125°C  
−ꢀ55°C TO +25°C  
0.4  
0.2  
0
V
@ I /I = 10  
C B  
CE(sat)  
q
FOR V  
BE(sat)  
VB  
−ꢀ1.5  
−ꢀ2.0  
1.0  
2.0 5.0  
10  
20  
50  
100  
200  
0
20  
40  
60  
80 100 120 140 160 180 200  
I , COLLECTOR CURRENT (mA)  
C
I , COLLECTOR CURRENT (mA)  
C
Figure 15. “ON” Voltages  
Figure 16. Temperature Coefficients  
http://onsemi.com  
6
PZT3906T1  
INFORMATION FOR USING THE SOT-223 SURFACE MOUNT PACKAGE  
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS  
Surface mount board layout is a critical portion of the total  
design. The footprint for the semiconductor packages must  
be the correct size to insure proper solder connection  
interface between the board and the package. With the  
correct pad geometry, the packages will self align when  
subjected to a solder reflow process.  
0.15  
3.8  
0.079  
2.0  
0.248  
6.3  
SOT-223  
0.091  
2.3  
0.091  
2.3  
0.079  
2.0  
mm  
inches  
0.059  
1.5  
0.059  
1.5  
0.059  
1.5  
SOT-223 POWER DISSIPATION  
The power dissipation of the SOT-223 is a function of  
doubled with this method, area is taken up on the printed  
circuit board which can defeat the purpose of using  
the pad size. This can vary from the minimum pad size for  
soldering to the pad size given for maximum power dissipa-  
tion. Power dissipation for a surface mount device is deter-  
surface mount technology. A graph of R versus collec-  
qJA  
tor pad area is shown in Figure 17.  
mined by T , the maximum rated junction temperature  
J(max)  
of the die, Rq , the thermal resistance from the device  
JA  
160  
junction to ambient; and the operating temperature, T . Us-  
A
ing the values provided on the data sheet for the SOT-223  
Board Material = 0.0625″  
G−10/FR−4, 2 oz Copper  
T = 25°C  
A
package, P can be calculated as follows.  
D
140  
120  
0.8 Watts  
TJ(max) - TA  
Rq  
PD =  
JA  
°
The values for the equation are found in the maximum  
ratings table on the data sheet. Substituting these values into  
1.5 Watts  
1.25 Watts*  
the equation for an ambient temperature T of 25°C, one  
can calculate the power dissipation of the device which in  
this case is 1.5 watts.  
100  
80  
A
*Mounted on the DPAK footprint  
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
150°C - 25°C  
83.3°C/W  
PD =  
= 1.50 watts  
A, Area (square inches)  
Figure 17. Thermal Resistance versus Collector  
Pad Area for the SOT-223 Package (Typical)  
The 83.3°C/W for the SOT-223 package assumes the  
use of the recommended footprint on a glass epoxy  
printed circuit board to achieve a power dissipation of 1.5  
watts. There are other alternatives to achieving higher  
power dissipation from the SOT-223 package. One is to  
increase the area of the collector pad. By increasing the  
area of the collector pad, the power dissipation can be  
increased. Although the power dissipation can almost be  
Another alternative would be to use a ceramic substrate  
or an aluminum core board such as Thermal Clad . Using  
a board material such as Thermal Clad, an aluminum core  
board, the power dissipation can be doubled using the same  
footprint.  
http://onsemi.com  
7
PZT3906T1  
SOLDER STENCIL GUIDELINES  
Prior to placing surface mount components onto a printed  
The stencil opening size for the surface mounted package  
should be the same as the pad size on the printed circuit  
board, i.e., a 1:1 registration.  
circuit board, solder paste must be applied to the pads. A  
solder stencil is required to screen the optimum amount of  
solder paste onto the footprint. The stencil is made of brass  
or stainless steel with a typical thickness of 0.008 inches.  
SOLDERING PRECAUTIONS  
The melting temperature of solder is higher than the rated  
temperature of the device. When the entire device is heated  
to a high temperature, failure to complete soldering within  
a short time could result in device failure. Therefore, the  
following items should always be observed in order to  
minimize the thermal stress to which the devices are  
subjected.  
• Always preheat the device.  
• The delta temperature between the preheat and  
soldering should be 100°C or less.*  
• The soldering temperature and time should not exceed  
260°C for more than 10 seconds.  
• When shifting from preheating to soldering, the  
maximum temperature gradient should be 5°C or less.  
• After soldering has been completed, the device should  
be allowed to cool naturally for at least three minutes.  
Gradual cooling should be used as the use of forced  
cooling will increase the temperature gradient and  
result in latent failure due to mechanical stress.  
• Mechanical stress or shock should not be applied dur-  
• When preheating and soldering, the temperature of the  
leads and the case must not exceed the maximum  
temperature ratings as shown on the data sheet. When  
using infrared heating with the reflow soldering  
method, the difference should be a maximum of 10°C.  
ing cooling  
* Soldering a device without preheating can cause exces-  
sive thermal shock and stress which can result in damage  
to the device.  
TYPICAL SOLDER HEATING PROFILE  
For any given circuit board, there will be a group of  
control settings that will give the desired heat pattern. The  
operator must set temperatures for several heating zones,  
and a figure for belt speed. Taken together, these control  
settings make up a heating “profile” for that particular  
circuit board. On machines controlled by a computer, the  
computer remembers these profiles from one operating  
session to the next. Figure 7 shows a typical heating profile  
for use when soldering a surface mount device to a printed  
circuit board. This profile will vary among soldering  
systems but it is a good starting point. Factors that can  
affect the profile include the type of soldering system in  
use, density and types of components on the board, type of  
solder used, and the type of board or substrate material  
being used. This profile shows temperature versus time.  
The line on the graph shows the actual temperature that  
might be experienced on the surface of a test board at or  
near a central solder joint. The two profiles are based on a  
high density and a low density board. The Vitronics  
SMD310 convection/infrared reflow soldering system was  
used to generate this profile. The type of solder used was  
62/36/2 Tin Lead Silver with a melting point between  
177 -189°C. When this type of furnace is used for solder  
reflow work, the circuit boards and solder joints tend to  
heat first. The components on the board are then heated by  
conduction. The circuit board, because it has a large surface  
area, absorbs the thermal energy more efficiently, then  
distributes this energy to the components. Because of this  
effect, the main body of a component may be up to 30  
degrees cooler than the adjacent solder joints.  
http://onsemi.com  
8
PZT3906T1  
STEP 5  
HEATING  
ZONES 4 & 7  
SPIKE"  
STEP 6 STEP 7  
VENT COOLING  
STEP 1  
PREHEAT  
ZONE 1  
RAMP"  
STEP 2  
VENT  
STEP 3  
HEATING  
STEP 4  
HEATING  
ZONES 3 & 6  
SOAK"  
SOAK" ZONES 2 & 5  
RAMP"  
205° TO 219°C  
PEAK AT  
SOLDER JOINT  
200°C  
150°C  
170°C  
DESIRED CURVE FOR HIGH  
MASS ASSEMBLIES  
160°C  
150°C  
SOLDER IS LIQUID FOR  
40 TO 80 SECONDS  
(DEPENDING ON  
140°C  
100°C  
MASS OF ASSEMBLY)  
100°C  
50°C  
DESIRED CURVE FOR LOW  
MASS ASSEMBLIES  
TIME (3 TO 7 MINUTES TOTAL)  
T
MAX  
Figure 18. Typical Solder Heating Profile  
http://onsemi.com  
9
PZT3906T1  
PACKAGE DIMENSIONS  
SOT-223 (TO-261)  
CASE 318E-04  
ISSUE K  
A
F
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
2. CONTROLLING DIMENSION: INCH.  
4
2
INCHES  
DIM MIN MAX  
MILLIMETERS  
S
B
MIN  
6.30  
3.30  
1.50  
0.60  
2.90  
2.20  
MAX  
6.70  
3.70  
1.75  
0.89  
3.20  
2.40  
0.100  
0.35  
2.00  
1.05  
10  
1
3
A
B
C
D
F
0.249  
0.130  
0.060  
0.024  
0.115  
0.087  
0.263  
0.145  
0.068  
0.035  
0.126  
0.094  
D
G
H
J
L
0.0008 0.0040 0.020  
G
0.009  
0.060  
0.033  
0
0.014  
0.078  
0.041  
10  
0.24  
1.50  
0.85  
0
J
K
L
C
M
S
_
_
_
_
0.08 (0003)  
0.264  
0.287  
6.70  
7.30  
M
H
K
STYLE 1:  
PIN 1. BASE  
2. COLLECTOR  
3. EMITTER  
4. COLLECTOR  
SENSEFET is a trademark of Semiconductor Components Industries, LLC.  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make  
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SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.  
PUBLICATION ORDERING INFORMATION  
Literature Fulfillment:  
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Phone: 81-3-5773-3850  
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PZT3906T1/D  
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