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PZTA96ST1G

型号:

PZTA96ST1G

品牌:

ONSEMI[ ONSEMI ]

页数:

8 页

PDF大小:

55 K

PZTA96ST1  
Preferred Device  
High Voltage Transistor  
PNP Silicon  
MAXIMUM RATINGS  
http://onsemi.com  
Rating  
Collector–Emitter Voltage  
Collector–Base Voltage  
Emitter–Base Voltage  
Collector Current  
Symbol  
Value  
–450  
–450  
–5.0  
–500  
1.5  
Unit  
Vdc  
V
CEO  
V
CBO  
V
EBO  
COLLECTOR 2,4  
Vdc  
Vdc  
BASE  
1
I
C
mAdc  
Watts  
Total Power Dissipation Up to  
P
D
T = 25°C (Note 1)  
A
EMITTER 3  
Storage Temperature Range  
Junction Temperature  
T
–65 to +150  
150  
°C  
°C  
stg  
T
J
4
THERMAL CHARACTERISTICS  
Characteristic  
Symbol  
Max  
Unit  
1
AWW  
ZTA96  
2
Thermal Resistance from Junction to  
Ambient (Note 1)  
R
83.3  
°C  
q
JA  
3
SOT–223, TO–261AA  
CASE 318E  
ELECTRICAL CHARACTERISTICS (Note 2)  
A
= Location  
STYLE 1  
WW  
= Work Week  
Characteristic  
Symbol  
Min Max  
Unit  
OFF CHARACTERISTICS  
Collector–Emitter Breakdown Voltage  
V
–450  
–450  
–5.0  
Vdc  
Vdc  
Vdc  
(BR)CEO  
(BR)CBO  
(BR)EBO  
ORDERING INFORMATION  
(I = –1.0 mAdc, I = 0)  
C
B
Device  
PZTA96ST1  
Package  
Shipping  
1000/Tape & Reel  
Collector–Emitter Breakdown Voltage  
(I = –100 mAdc, I = 0)  
V
V
C
E
SOT–223  
Emitter–Base Breakdown Voltage  
(I = –10 mAdc, I = 0)  
E
C
Preferred devices are recommended choices for future use  
and best overall value.  
Collector–Base Cutoff Current  
(V = –400 Vdc, I = 0)  
I
–0.1 mAdc  
–0.1 mAdc  
CBO  
CB  
E
Emitter–Base Cutoff Current  
(V = –4.0 Vdc, I = 0)  
I
EBO  
BE  
C
ON CHARACTERISTICS  
DC Current Gain (Note 3)  
h
FE  
50  
150  
(I = –10 mAdc, V = –10 Vdc)  
C
CE  
Saturation Voltages  
Vdc  
(I = –20 mAdc, I = –2.0 mAdc)  
V
–0.6  
–1.0  
C
B
CE(sat)  
V
BE(sat)  
(I = –20 mAdc, I = –2.0 mAdc)  
C
B
1. Device mounted on a glass epoxy printed circuit board 1.575 in. x 1.575 in.  
2
x 0.059 in.; mounting pad for the collector lead min. 0.93 in .  
2. T = 25°C unless otherwise noted.  
A
3. Pulse Test: Pulse Width 300 ms; Duty Cycle = 2.0%.  
Semiconductor Components Industries, LLC, 2002  
1
Publication Order Number:  
June, 2002 – Rev. 1  
PZTA96ST1/D  
PZTA96ST1  
INFORMATION FOR USING THE SOT–223 SURFACE MOUNT PACKAGE  
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS  
Surface mount board layout is a critical portion of the total  
design. The footprint for the semiconductor packages must  
be the correct size to insure proper solder connection  
interface between the board and the package. With the  
correct pad geometry, the packages will self align when  
subjected to a solder reflow process.  
0.15  
3.8  
0.079  
2.0  
0.248  
6.3  
SOT–223  
0.091  
2.3  
0.091  
2.3  
0.079  
2.0  
mm  
inches  
0.059  
1.5  
0.059  
1.5  
0.059  
1.5  
SOT–223 POWER DISSIPATION  
The power dissipation of the SOT–223 is a function of  
doubled with this method, area is taken up on the printed  
circuit board which can defeat the purpose of using  
the pad size. This can vary from the minimum pad size for  
soldering to the pad size given for maximum power dissipa-  
tion. Power dissipation for a surface mount device is deter-  
surface mount technology. A graph of R versus collec-  
qJA  
tor pad area is shown in Figure 1.  
mined by T , the maximum rated junction temperature  
J(max)  
of the die, Rq , the thermal resistance from the device  
JA  
160  
junction to ambient; and the operating temperature, T . Us-  
A
ing the values provided on the data sheet for the SOT–223  
Board Material = 0.0625″  
GĆ10/FRĆ4, 2 oz Copper  
T = 25°C  
A
package, P can be calculated as follows.  
D
140  
120  
0.8 Watts  
T
J(max) – TA  
Rq  
PD =  
JA  
°
The values for the equation are found in the maximum  
ratings table on the data sheet. Substituting these values into  
1.5 Watts  
1.25 Watts*  
the equation for an ambient temperature T of 25°C, one  
can calculate the power dissipation of the device which in  
this case is 1.5 watts.  
100  
80  
A
*Mounted on the DPAK footprint  
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
150°C – 25°C  
83.3°C/W  
PD =  
= 1.50 watts  
A, Area (square inches)  
Figure 1. Thermal Resistance versus Collector  
Pad Area for the SOT-223 Package (Typical)  
The 83.3°C/W for the SOT-223 package assumes the  
use of the recommended footprint on a glass epoxy  
printed circuit board to achieve a power dissipation of 1.5  
watts. There are other alternatives to achieving higher  
power dissipation from the SOT-223 package. One is to  
increase the area of the collector pad. By increasing the  
area of the collector pad, the power dissipation can be  
increased. Although the power dissipation can almost be  
Another alternative would be to use a ceramic substrate  
or an aluminum core board such as Thermal Clad . Using  
a board material such as Thermal Clad, an aluminum core  
board, the power dissipation can be doubled using the same  
footprint.  
http://onsemi.com  
2
PZTA96ST1  
SOLDER STENCIL GUIDELINES  
Prior to placing surface mount components onto a printed  
The stencil opening size for the surface mounted package  
should be the same as the pad size on the printed circuit  
board, i.e., a 1:1 registration.  
circuit board, solder paste must be applied to the pads. A  
solder stencil is required to screen the optimum amount of  
solder paste onto the footprint. The stencil is made of brass  
or stainless steel with a typical thickness of 0.008 inches.  
SOLDERING PRECAUTIONS  
The melting temperature of solder is higher than the rated  
temperature of the device. When the entire device is heated  
to a high temperature, failure to complete soldering within  
a short time could result in device failure. Therefore, the  
following items should always be observed in order to  
minimize the thermal stress to which the devices are  
subjected.  
Always preheat the device.  
The delta temperature between the preheat and  
soldering should be 100°C or less.*  
The soldering temperature and time should not exceed  
260°C for more than 10 seconds.  
When shifting from preheating to soldering, the  
maximum temperature gradient should be 5°C or less.  
After soldering has been completed, the device should  
be allowed to cool naturally for at least three minutes.  
Gradual cooling should be used as the use of forced  
cooling will increase the temperature gradient and  
result in latent failure due to mechanical stress.  
Mechanical stress or shock should not be applied dur-  
When preheating and soldering, the temperature of the  
leads and the case must not exceed the maximum  
temperature ratings as shown on the data sheet. When  
using infrared heating with the reflow soldering  
method, the difference should be a maximum of 10°C.  
ing cooling  
* Soldering a device without preheating can cause exces-  
sive thermal shock and stress which can result in damage  
to the device.  
TYPICAL SOLDER HEATING PROFILE  
For any given circuit board, there will be a group of  
control settings that will give the desired heat pattern. The  
operator must set temperatures for several heating zones,  
and a figure for belt speed. Taken together, these control  
settings make up a heating “profile” for that particular  
circuit board. On machines controlled by a computer, the  
computer remembers these profiles from one operating  
session to the next. Figure 7 shows a typical heating profile  
for use when soldering a surface mount device to a printed  
circuit board. This profile will vary among soldering  
systems but it is a good starting point. Factors that can  
affect the profile include the type of soldering system in  
use, density and types of components on the board, type of  
solder used, and the type of board or substrate material  
being used. This profile shows temperature versus time.  
The line on the graph shows the actual temperature that  
might be experienced on the surface of a test board at or  
near a central solder joint. The two profiles are based on a  
high density and a low density board. The Vitronics  
SMD310 convection/infrared reflow soldering system was  
used to generate this profile. The type of solder used was  
62/36/2 Tin Lead Silver with a melting point between  
177–189°C. When this type of furnace is used for solder  
reflow work, the circuit boards and solder joints tend to  
heat first. The components on the board are then heated by  
conduction. The circuit board, because it has a large surface  
area, absorbs the thermal energy more efficiently, then  
distributes this energy to the components. Because of this  
effect, the main body of a component may be up to 30  
degrees cooler than the adjacent solder joints.  
http://onsemi.com  
3
PZTA96ST1  
STEP 5  
HEATING  
ZONES 4 & 7  
SPIKE"  
STEP 6 STEP 7  
VENT COOLING  
STEP 1  
PREHEAT  
ZONE 1  
RAMP"  
STEP 2  
VENT  
STEP 3  
HEATING  
STEP 4  
HEATING  
ZONES 3 & 6  
SOAK"  
SOAK" ZONES 2 & 5  
RAMP"  
205° TO 219°C  
PEAK AT  
SOLDER JOINT  
200°C  
150°C  
170°C  
DESIRED CURVE FOR HIGH  
MASS ASSEMBLIES  
160°C  
150°C  
SOLDER IS LIQUID FOR  
40 TO 80 SECONDS  
(DEPENDING ON  
140°C  
100°C  
MASS OF ASSEMBLY)  
100°C  
50°C  
DESIRED CURVE FOR LOW  
MASS ASSEMBLIES  
TIME (3 TO 7 MINUTES TOTAL)  
T
MAX  
Figure 2. Typical Solder Heating Profile  
http://onsemi.com  
4
PZTA96ST1  
PACKAGE DIMENSIONS  
SOT–223  
(TO–261AA)  
PLASTIC PACKAGE  
CASE 318E–04  
ISSUE K  
A
F
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
2. CONTROLLING DIMENSION: INCH.  
4
2
INCHES  
DIM MIN MAX  
MILLIMETERS  
S
B
MIN  
6.30  
3.30  
1.50  
0.60  
2.90  
2.20  
MAX  
6.70  
3.70  
1.75  
0.89  
3.20  
2.40  
0.100  
0.35  
2.00  
1.05  
10  
1
3
A
B
C
D
F
0.249  
0.130  
0.060  
0.024  
0.115  
0.087  
0.263  
0.145  
0.068  
0.035  
0.126  
0.094  
D
G
H
J
L
0.0008 0.0040 0.020  
G
0.009  
0.060  
0.033  
0
0.014  
0.078  
0.041  
10  
0.24  
1.50  
0.85  
0
J
K
L
C
M
S
_
_
_
_
0.08 (0003)  
0.264  
0.287  
6.70  
7.30  
M
H
K
STYLE 1:  
PIN 1. BASE  
2. COLLECTOR  
3. EMITTER  
4. COLLECTOR  
http://onsemi.com  
5
PZTA96ST1  
Notes  
http://onsemi.com  
6
PZTA96ST1  
Notes  
http://onsemi.com  
7
PZTA96ST1  
Thermal Clad is a trademark of the Bergquist Company.  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make  
changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any  
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all  
liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be  
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.  
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death  
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC  
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees  
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that  
SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.  
PUBLICATION ORDERING INFORMATION  
Literature Fulfillment:  
JAPAN: ON Semiconductor, Japan Customer Focus Center  
4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031  
Phone: 81–3–5740–2700  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada  
Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada  
Email: ONlit@hibbertco.com  
Email: r14525@onsemi.com  
ON Semiconductor Website: http://onsemi.com  
For additional information, please contact your local  
Sales Representative.  
N. American Technical Support: 800–282–9855 Toll Free USA/Canada  
PZTA96ST1/D  
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