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SZESD8451N2T5G

型号：

SZESD8451N2T5G

品牌：

ONSEMI[ ONSEMI ]

页数：

9 页

PDF大小：

294 K

下载PDF手册
ESD8451, SZESD8451  
ESD Protection Diodes  
Low Capacitance ESD Protection Diode  
for High Speed Data Line  
The ESD8451 Series ESD protection diodes are designed to protect  
high speed data lines from ESD. Ultra−low capacitance and low ESD  
clamping voltage make this device an ideal solution for protecting  
voltage sensitive high speed data lines.  
www.onsemi.com  
MARKING  
DIAGRAMS  
Features  
PIN 1  
• Low Capacitance (0.30 pF Max, I/O to GND)  
X3DFN2  
CASE 152AF  
M
• Protection for the Following IEC Standards:  
IEC 61000−4−2 (Level 4)  
ISO10605 330 pF / 2 kW 30 kV Contact  
• Low ESD Clamping Voltage  
XDFN2  
CASE 711AM  
A M  
G
• SZ Prefix for Automotive and Other Applications Requiring Unique  
Site and Control Change Requirements; AEC−Q101 Qualified and  
PPAP Capable  
P, A  
M
= Specific Device Code  
= Date Code  
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS  
Compliant  
PIN CONFIGURATION  
AND SCHEMATIC  
Typical Applications  
• USB 3.0  
• MHL 2.0  
• eSATA  
1
2
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
Rating  
Symbol  
Value  
−55 to +125  
−55 to +150  
260  
Unit  
°C  
Operating Junction Temperature Range  
Storage Temperature Range  
T
J
=
T
stg  
°C  
Lead Solder Temperature −  
Maximum (10 Seconds)  
T
L
°C  
IEC 61000−4−2 Contact (ESD)  
IEC 61000−4−2 Air (ESD)  
ESD  
ESD  
15  
15  
kV  
kV  
Stresses exceeding those listed in the Maximum Ratings table may damage the  
device. If any of these limits are exceeded, device functionality should not be  
assumed, damage may occur and reliability may be affected.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 7 of this data sheet.  
See Application Note AND8308/D for further description of  
survivability specs.  
© Semiconductor Components Industries, LLC, 2015  
1
Publication Order Number:  
February, 2015 − Rev. 4  
ESD8451/D  
ESD8451, SZESD8451  
ELECTRICAL CHARACTERISTICS  
I
(T = 25°C unless otherwise noted)  
A
I
PP  
Symbol  
Parameter  
R
DYN  
V
RWM  
Working Peak Voltage  
I
HOLD  
I
R
Maximum Reverse Leakage Current @ V  
RWM  
I
I
T
V
V
BR  
Breakdown Voltage @ I  
V
V
V V  
C RWM HOLD  
BR  
T
R
I
I
V
V
V
V
R
T
BR  
HOLD RWM  
C
I
T
Test Current  
I
V
Holding Reverse Voltage  
Holding Reverse Current  
Dynamic Resistance  
Maximum Peak Pulse Current  
HOLD  
HOLD  
HOLD  
I
R
DYN  
R
DYN  
−I  
PP  
I
PP  
V
C
= V  
+ (I * R  
)
HOLD  
PP  
DYN  
V
C
Clamping Voltage @ I  
PP  
V
C
= V  
+ (I * R  
)
HOLD  
PP  
DYN  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)  
A
Parameter  
Symbol  
Conditions  
Min  
Typ  
Max  
3.3  
Unit  
V
Reverse Working Voltage  
Breakdown Voltage  
V
RWM  
I/O Pin to GND  
I = 1 mA, I/O Pin to GND  
V
BR  
5.5  
7.9  
8.5  
V
T
Reverse Leakage Current  
Reverse Holding Voltage  
Holding Reverse Current  
Clamping Voltage (Note 1)  
I
V
= 3.3 V, I/O Pin to GND  
500  
nA  
V
R
RWM  
V
I/O Pin to GND  
2.05  
17  
HOLD  
HOLD  
I
I/O Pin to GND  
mA  
V
V
V
IEC61000−4−2, 8 KV Contact  
C
ESD8451MUT5G  
Clamping Voltage  
TLP (Note 2)  
11.0  
19.0  
9.0  
V
I
PP  
= 8 A  
IEC 61000−4−2 Level 2 equivalent  
( 4 kV Contact, 4 kV Air)  
C
I
I
= 16 A  
PP  
IEC 61000−4−2 Level 4 equivalent  
( 8 kV Contact, 8 kV Air)  
ESD8451N2T5G  
Clamping Voltage  
TLP (Note 2)  
V
V
I
PP  
= 8 A  
IEC 61000−4−2 Level 2 equivalent  
( 4 kV Contact, 4 kV Air)  
C
= 16 A  
16.0  
PP  
IEC 61000−4−2 Level 4 equivalent  
( 8 kV Contact, 8 kV Air)  
ESD8451MUT5G  
Dynamic Resistance  
R
R
Pin1 to Pin2  
Pin2 to Pin1  
1.0  
1.0  
W
W
DYN  
DYN  
ESD8451N2T5G  
Dynamic Resistance  
Pin1 to Pin2  
Pin2 to Pin1  
0.84  
0.84  
Junction Capacitance  
Junction Capacitance  
C
C
V
R
V
R
= 0 V, f = 1 MHz  
0.20  
0.19  
0.30  
0.25  
pF  
pF  
J
J
= 0 V, f = 2.5 GHz  
1. For test procedure see Figure 12 and application note AND8307/D.  
2. ANSI/ESD STM5.5.1 − Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model.  
TLP conditions: Z = 50 W, t = 100 ns, t = 4 ns, averaging window; t = 30 ns to t = 60 ns.  
0
p
r
1
2
www.onsemi.com  
2
 
ESD8451, SZESD8451  
TYPICAL CHARACTERISTICS  
1.0  
0.9  
1.0  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
−3.5 −2.5  
0.1  
0
−3.5 −2.5  
−1.5  
−0.5  
0.5  
(V)  
1.5  
2.5  
3.5  
−1.5  
−0.5  
0.5  
(V)  
1.5  
2.5  
3.5  
V
BIAS  
V
BIAS  
Figure 1. ESD8451MUT5G CV Characteristics  
Figure 2. ESD8451N2T5G CV Characteristics  
2
0
2
0
m1  
m1  
m2  
m2  
−2  
−2  
−4  
−6  
−4  
−6  
−8  
−8  
−10  
−10  
−12  
−14  
−12  
−14  
1E7  
1E8  
1E9  
1E10 3E10  
1E7  
1E8  
1E9  
1E10 3E10  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 3. ESD8451MUT5G S21 Insertion Loss  
Figure 4. ESD8451N2T5G S21 Insertion Loss  
1.0  
0.9  
1.0  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
0.1  
0
1
2
3
4
5
6
7
8
9
10  
1
2
3
4
5
6
7
8
9
10  
FREQUENCY (GHz)  
FREQUENCY (GHz)  
Figure 5. ESD8451MUT5G Capacitance over  
Frequency  
Figure 6. ESD8451N2T5G Capacitance over  
Frequency  
www.onsemi.com  
3
ESD8451, SZESD8451  
TYPICAL CHARACTERISTICS  
20  
18  
10  
20  
18  
10  
8
16  
14  
12  
10  
8
8
16  
14  
12  
10  
8
6
6
4
4
6
6
4
2
0
4
2
0
2
0
2
0
0
2
4
6
8
10 12 14 16 18 20 22 24  
0
2
4
6
8
10 12 14 16 18 20  
V , VOLTAGE (V)  
C
V , VOLTAGE (V)  
C
Figure 7. ESD8451MUT5G Positive TLP I−V  
Curve  
Figure 8. ESD8451N2T5G Positive TLP I−V  
Curve  
10  
8
−20  
−18  
10  
8
−20  
−18  
−16  
−14  
−12  
−10  
−8  
−16  
−14  
−12  
−10  
−8  
6
6
4
4
−6  
−6  
−4  
2
0
−4  
2
0
−2  
0
−2  
0
0
2
4
6
8
10 12 14 16 18 20 22 24  
0
2
4
6
8
10 12 14 16 18 20  
V , VOLTAGE (V)  
C
V , VOLTAGE (V)  
C
Figure 9. ESD8451MUT5G Negative TLP I−V  
Curve  
Figure 10. ESD8451N2T5G Negative TLP I−V  
Curve  
www.onsemi.com  
4
ESD8451, SZESD8451  
Latch−Up Considerations  
stable operating point of the circuit and the system is  
therefore latch−up free. In the non−latch up free load line  
case, the IV characteristic of the snapback protection device  
ON Semiconductor’s 8000 series of ESD protection  
devices utilize a snap−back, SCR type structure. By using  
this technology, the potential for a latch−up condition was  
taken into account by performing load line analyses of  
common high speed serial interfaces. Example load lines for  
latch−up free applications and applications with the  
potential for latch−up are shown below with a generic IV  
characteristic of a snapback, SCR type structured device  
overlaid on each. In the latch−up free load line case, the IV  
characteristic of the snapback protection device intersects  
intersects the load−line in two points (V  
, I  
OPA OPA  
) and  
(V , I ). Therefore in this case, the potential for  
OPB OPB  
latch−up exists if the system settles at (V  
, I  
) after a  
OPB OPB  
transient. Because of this, ESD8451 should not be used for  
HDMI applications – ESD8104 or ESD8040 have been  
designed to be acceptable for HDMI applications without  
latch−up. Please refer to Application Note AND9116/D for  
a more in−depth explanation of latch−up considerations  
using ESD8000 series devices.  
the load−line in one unique point (V , I ). This is the only  
OP OP  
ESD8451 Latch*up free:  
USB 2.0 LS/FS, USB 2.0 HS,  
USB 3.0 SS, DisplayPort  
ESD8451 Potential Latch*up:  
HDMI 1.4/1.3a TMDS  
Figure 11. Example Load Lines for Latch−up Free Applications and Applications with the Potential for Latch−up  
Table 1. SUMMARY OF SCR REQUIREMENTS FOR LATCH−UP FREE APPLICATIONS  
VBR (min)  
(V)  
IH (min)  
(mA)  
VH (min)  
(V)  
ON Semiconductor ESD8000 Series  
Recommended PN  
Application  
HDMI 1.4/1.3a TMDS  
USB 2.0 LS/FS  
USB 2.0 HS  
3.465  
3.301  
0.482  
2.800  
3.600  
54.78  
1.76  
N/A  
1.0  
1.0  
1.0  
1.0  
1.0  
ESD8104, ESD8040  
ESD8004, ESD8451  
ESD8004, ESD8451  
USB 3.0 SS  
N/A  
ESD8004, ESD8006, ESD8451  
ESD8004, ESD8006, ESD8451  
DisplayPort  
25.00  
www.onsemi.com  
5
ESD8451, SZESD8451  
IEC61000−4−2 Waveform  
IEC 61000−4−2 Spec.  
I
peak  
First Peak  
Current  
(A)  
100%  
90%  
Test Volt-  
age (kV)  
Current at  
30 ns (A)  
Current at  
60 ns (A)  
Level  
1
2
3
4
2
4
6
8
7.5  
15  
4
8
2
4
6
8
I @ 30 ns  
22.5  
30  
12  
16  
I @ 60 ns  
10%  
t
P
= 0.7 ns to 1 ns  
Figure 12. IEC61000−4−2 Spec  
50 W Coax  
Cable  
Transmission Line Pulse (TLP) Measurement  
L
Attenuator  
S
Transmission Line Pulse (TLP) provides current versus  
voltage (I−V) curves in which each data point is obtained  
from a 100 ns long rectangular pulse from a charged  
transmission line. A simplified schematic of a typical TLP  
system is shown in Figure 13. TLP I−V curves of ESD  
protection devices accurately demonstrate the product’s  
ESD capability because the 10s of amps current levels and  
under 100 ns time scale match those of an ESD event. This  
is illustrated in Figure 14 where an 8 kV IEC 61000−4−2  
current waveform is compared with TLP current pulses at  
8 A and 16 A. A TLP I−V curve shows the voltage at which  
the device turns on as well as how well the device clamps  
voltage over a range of current levels.  
÷
50 W Coax  
Cable  
I
M
V
M
10 MW  
DUT  
V
C
Oscilloscope  
Figure 13. Simplified Schematic of a Typical TLP  
System  
Figure 14. Comparison Between 8 kV IEC 61000−4−2 and 8 A and 16 A TLP Waveforms  
www.onsemi.com  
6
 
ESD8451, SZESD8451  
ORDERING INFORMATION  
Device  
†
Package  
Shipping  
ESD8451N2T5G,  
SZESD8451N2T5G*  
XDFN2  
(Pb−Free)  
8000 / Tape & Reel  
15000 / Tape & Reel  
ESD8451MUT5G,  
X3DFN2  
SZESD8451MUT5G*  
(Pb−Free)  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
*SZ Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP  
Capable.  
www.onsemi.com  
7
ESD8451, SZESD8451  
PACKAGE DIMENSIONS  
X3DFN2, 0.62x0.32, 0.355P, (0201)  
CASE 152AF  
ISSUE A  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER  
ASME Y14.5M, 1994.  
A B  
D
2. CONTROLLING DIMENSION: MILLIMETERS.  
PIN 1  
INDICATOR  
(OPTIONAL)  
MILLIMETERS  
DIM MIN  
MAX  
0.33  
0.05  
0.28  
0.66  
0.36  
A
A1  
b
D
E
0.25  
−−−  
E
TOP VIEW  
0.22  
0.58  
0.28  
e
0.355 BSC  
0.23  
L2 0.17  
0.05  
0.05  
C
C
A
RECOMMENDED  
2X  
MOUNTING FOOTPRINT*  
A1  
SIDE VIEW  
SEATING  
PLANE  
C
2X  
0.74  
0.30  
1
e
2X b  
1
2
2X  
0.31  
DIMENSIONS: MILLIMETERS  
M
0.05  
C A B  
2X L2  
See Application Note AND8398/D for more mounting details  
M
0.05  
C A B  
BOTTOM VIEW  
*For additional information on our Pb−Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
www.onsemi.com  
8
ESD8451, SZESD8451  
PACKAGE DIMENSIONS  
XDFN2 1.0x0.6, 0.65P (SOD−882)  
CASE 711AM  
ISSUE O  
NOTES:  
0.10  
C
1. DIMENSIONING AND TOLERANCING PER  
ASME Y14.5M, 1994.  
2. CONTROLLING DIMENSION: MILLIMETERS.  
3. EXPOSED COPPER ALLOWED AS SHOWN.  
A B  
E
D
PIN 1  
INDICATOR  
MILLIMETERS  
DIM MIN  
MAX  
0.44  
0.05  
0.53  
A
A1  
b
0.34  
−−−  
0.43  
0.05  
C
TOP VIEW  
D
E
e
1.00 BSC  
0.60 BSC  
0.65 BSC  
NOTE 3  
A
0.10  
0.10  
C
L
0.20  
0.30  
C
RECOMMENDED  
A1  
SEATING  
PLANE  
C
SOLDER FOOTPRINT*  
SIDE VIEW  
1.20  
2X  
2X  
0.47  
e
0.60  
b
e/2  
PIN 1  
M
0.05  
C A B  
1
DIMENSIONS: MILLIMETERS  
2X  
L
*For additional information on our Pb−Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
M
0.05  
C A B  
BOTTOM VIEW  
HDMI is a registered trademark of HDMI Licensing, LLC.  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,  
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC  
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any  
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without  
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications  
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC  
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for  
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where  
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and  
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,  
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture  
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
N. American Technical Support: 800−282−9855 Toll Free  
USA/Canada  
Europe, Middle East and Africa Technical Support:  
Phone: 421 33 790 2910  
Japan Customer Focus Center  
Phone: 81−3−5817−1050  
ON Semiconductor Website: www.onsemi.com  
Order Literature: http://www.onsemi.com/orderlit  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada  
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada  
Email: orderlit@onsemi.com  
For additional information, please contact your local  
Sales Representative  
ESD8451/D  
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