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CYL2T0201-AIP

型号:

CYL2T0201-AIP

描述:

成帧器和映射器\n[ Framers and Mappers ]

品牌:

ETC[ ETC ]

页数:

4 页

PDF大小:

34 K

ADVANCE  
INFORMATION  
CYL2T0201  
MetroLink2T-2™ Link Layer  
• Programmable parity generation and checking on the  
PHY and framer parallel interfaces  
Features  
• Maps two channels of Gigabit Ethernet (GbE), Fibre  
Channel (1X, 1/2X, 1/4X), FICON , or ESCON® indepen-  
dently onto a SPI-3 interface for transparent transport  
over SONET/SDH  
• Programmable loopback functions for link verification  
— SERDES interface loopback  
— GFP-T mapper/demapper client-side loopback  
• 1.8V core and 3.3V I/O supplies  
— OC-48/STM-16, OC-12/STM-4 rates  
— Compliant to draft recommendation of Transparent  
Generic Framing Procedure (GFP-T) per the ITU-T  
G.7041 (Version 0.4, October 2001)  
Cypress GFP-T Transport Solution  
• MetroLink2T-2 , POSIC2G /POSIC2GVC , and  
HOTLink II provideacompleteend-to-endGFP-Tsolution  
• Provides seamless interface to Cypress POSIC2GVC  
(CY7C9536) and POSIC2G (CY7C9537) to support:  
• Supports the following features to enable GFP-T  
mapping of client payload of GbE, Fibre Channel, or  
ESCON:  
— Special character mapping  
— GFP-T frame delineation  
— Mapping and demapping into the GFP-T superblock  
with a user-defined size  
— cHEC checking, calculation and scrambling  
— Payload scrambling  
— Automatic 65B_PAD/10B_ERR character insertion  
and deletion  
— Idle frame insertion and deletion  
• Multiplexed CPU bus interface to POSIC2G/POSIC2GVC  
(allows for a single CPU bus interface to both Metrolink2T  
and POSIC2G/POSIC2GVC without external muxing)  
• Glueless parallel interface to Cypress HOTLink II trans-  
ceivers to support:  
— Client management frame (CMF) generation and  
checking  
• Register programmable rate adaptation by  
adding/removal of idle code sequences for:  
— Gigabit Ethernet (IEEE 802.3z)  
— Fibre Channel  
— ESCON  
— Clock and data recovery for GbE, Fibre Channel, and  
ESCON  
— Word framing  
— 8B/10B encoding and decoding  
— Special character detection and flagging  
— FICON  
• Programmable watermarks on each channel’s egress  
FIFO to prevent overflow/underflow conditions by  
enabling rate adaptation  
• Support for programmable interrupt generation on  
error condition detection  
Network Equipment  
• DWDM transport equipment  
• Multiservice provisioning platforms (MSPP)  
• SONET/SDH add/drop multiplexers (ADM)  
• SONET/SDH digital cross connects (DCS)  
• 32-bit host interface for register programming and  
performance monitoring  
• Complete performance monitoring using error  
counters in both egress and ingress directions  
8-bit data  
bus, control  
to optical  
16-bit  
HSTL  
GbE,  
OC-48/  
STM-16  
Framer  
OC-48/  
STM-16  
PHY  
Two-Channel  
SERDES  
Dual-Channel  
GFP-T Mapper  
modules  
FICON,  
ESCON,  
FC  
SPI-3  
POSIC2G/  
POSIC2GVC  
CPU Interface  
8-bit data  
bus, control  
CYL2T0201  
CYP15G0201DX  
CY7C9536  
CYS25G0101DX  
CPU  
Interface  
Control CPU  
Figure 1. MetroLink2T-2 Application  
Cypress Semiconductor Corporation  
Document #: 38-02071 Rev. **  
3901 North First Street  
San Jose, CA 95134  
408-943-2600  
Revised March 3, 2003  
ADVANCE  
INFORMATION  
CYL2T0201  
Block Diagram  
CONTROL_A  
DATA_A  
CHANNEL  
A
CHANNEL  
A
CONTROL  
8
32  
DATA  
SERDESI/F  
GFP-T DEMAPPER  
CONTROL_B  
DATA_B  
CHANNEL  
B
CHANNEL  
B
SPI-3  
RXI/F  
8
CONTROL_A  
CHANNEL  
A
CONTROL  
DATA  
CHANNEL  
A
DATA_A  
8
GFP-T MAPPER  
SERDESI/F  
32  
CONTROL_B  
DATA_B  
CHANNEL  
B
CHANNEL  
B
SPI-3  
TXI/F  
8
CPUI/F  
CPU  
I/F  
FRAMER  
I/F  
CPU Interface  
Figure 2. MetroLink2T-2 Top-Level Block Diagram  
Document #: 38-02071 Rev. **  
Page 2 of 4  
ADVANCE  
INFORMATION  
CYL2T0201  
The MetroLink2T-2 mapping engine follows the ITU recom-  
mendation G.7041 from January 2002. The GFP-T engine in  
the MetroLink2T-2 device supports one or two channels, and  
contains protocol-specific functions to allow the seamless  
transport of Fibre Channel, FICON, ESCON, or GbE.  
Overview  
Applications  
Metro service aggregation nodes aggregate client traffic such  
as GbE, ESCON, or Fibre Channel into SONET/SDH payloads  
for long-haul transport. Such nodes require the ability to  
ensure just the right amount of bandwidth is allocated for the  
client payload -- which is where virtual concatenation becomes  
beneficial due to its convenience in specifying payload size.  
SPI-3 Interface  
The SPI-3 interface was designed to support Packet-over-  
SONET/SDH (POS) in the OC-48/STM-16 (2.488 Gbps) and  
below environment. It allows efficient packet transfer between  
a framer and a link layer device. SPI-3 supports multiple ports  
and has in-band port selection.  
The MetroLink2T-2 Link-Layer device aggregates two  
channels of GbE, Fibre Channel, FICON, or ESCON client  
traffic onto a single SPI-3 bus. The MetroLink2T-2 SPI-3  
interface connects to the POSIC2GVC/POSIC2G framer  
which is used to create the SONET/SDH frame required for  
network transport.  
SPI-3 has discrete transmit/receive control signals for Start of  
Packet (SOP), End of Packet (EOP), start of transfer, error  
indications, and other control indications. Transmit FIFO  
status flow control is provided by using either a polling or a  
direct status indication scheme.  
SERDES Interface  
The CYL2T0201 MetroLink2T-2 GFP-T mapper interface to  
the two-channel SERDES device supports the following  
functions:  
Since the SPI-3 interface supports data transfers at clock rates  
independent of the actual line bit rate, FIFOs are specified to  
allow the rate decoupling.  
• Error detection and handling  
• Egress rate adaptation.  
The SPI-3 interface specifies parity on the data bus. SPI-3 also  
specifies a maximum clock rate of 104 MHz.  
The SERDES interface allows for a seamless connection to  
the CY15G0201DX device, as shown in Figure 1.  
Since the SPI-3 interface is a point-to-point interface, the  
MetroLink2T-2 should connect to one framer device, such as  
a POSIC2GVC. SPI-3 and MetroLink2T-2 support variable-  
length packets. MetroLink2T-2 supports the 32-bit-wide  
packet-level transfer mode of SPI-3.  
GFP-T Engine  
GFP-T is a version of GFP that provides the benefits of frame-  
mapped GFP (header error correction/rugged links,” known  
transport bandwidth/no byte-stuffing) with low latency.  
In SPI-3, the PHY port address is inserted in-band with the  
packet data being transferred on the data bus. SPI-3 allows up  
to 256 ports; since MetroLink2T-2 is a two-channel device,  
only one or two SPI-3 ports are supported by MetroLink2T-2.  
ESCON is a registered trademark, and FICON is a trademark, of IBM Corporation. MetroLink2T-2, POSIC2GVC, and POSIC2G  
are trademarks of Cypress Semiconductor. All product and company names mentioned in this document are the trademarks of  
their respective holders.  
Document #: 38-02071 Rev. **  
Page 3 of 4  
© Cypress Semiconductor Corporation, 2003. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use  
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize  
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress  
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.  
ADVANCE  
INFORMATION  
CYL2T0201  
Document History Page  
Document Title: CYL2T0201 MetroLink2T-2™ Link Layer  
Document Number: 38-02071  
Orig. of  
Issue Date Change  
REV.  
ECN No.  
Description  
**  
122359  
03/12/03  
AMV  
New Data Sheet  
Document #: 38-02071 Rev. **  
Page 4 of 4  
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