找货询价

一对一服务 找料无忧

专属客服

服务时间

周一 - 周六 9:00-18:00

QQ咨询

一对一服务 找料无忧

专属客服

服务时间

周一 - 周六 9:00-18:00

技术支持

一对一服务 找料无忧

专属客服

服务时间

周一 - 周六 9:00-18:00

售后咨询

一对一服务 找料无忧

专属客服

服务时间

周一 - 周六 9:00-18:00

IZ4040B

型号:

IZ4040B

描述:

12级二进制纹波计数器[ 12-Stage Binary Ripple Counter ]

品牌:

INTEGRAL[ INTEGRAL CORP. ]

页数:

7 页

PDF大小:

63 K

TECHNICAL DATA  
IW4040B  
12-Stage Binary Ripple Counter  
High-Voltage Silicon-Gate CMOS  
N SUFFIX  
PLASTIC DIP  
The IW4040B is ripple-carry binary counter. All counter stages are  
master-slave flip-flops. The state of a counter advances one count on the  
negative transition of each input pulse; a high level on the RESET line resets  
the counter to its all zeros state. Schmitt trigger action on the input-pulse  
line permits unlimited rise and fall times.  
16  
1
·
·
Operating Voltage Range: 3.0 to 18 V  
Maximum input current of 1 mA at 18 V over full package-temperature  
range; 100 nA at 18 V and 25°C  
16  
1
·
Noise margin (over full package temperature range):  
1.0 V min @ 5.0 V supply  
ORDERING INFORMATION  
2.0 V min @ 10.0 V supply  
2.5 V min @ 15.0 V supply  
IW4040BN Plastic DIP  
IW4040BD SOIC  
IZ4040B  
chip  
TA = -55° to 125° C  
for all packages  
LOGIC DIAGRAM  
9
Q1  
PIN ASSIGNMENT  
7
Q2  
6
V
Q12  
Q6  
1
2
3
4
5
6
7
8
16  
CC  
Q3  
15 Q11  
14 Q10  
5
3
10  
CLOCK  
Q4  
Q5  
Q8  
12 Q9  
Q7  
13  
Q5  
Q6  
Q7  
Q8  
Q4  
2
Q3  
11  
RESET  
4
Q2  
10 CLOCK  
13  
12  
GND  
9
Q1  
Q9  
FUNCTION TABLE  
14  
15  
Q10  
Inputs  
Clock  
Output  
Q11  
Q12  
1
Reset  
Output state  
L
No change  
11  
Advance to next  
state  
L
RESET  
X
H
All Outputs are low  
H= high level  
L = low level  
X=don’t care  
PIN 16 =VCC  
PIN 8 = GND  
INTEGRAL  
1
IW4040B  
MAXIMUM RATINGS*  
Symbol  
Parameter  
Value  
-0.5 to +20  
-0.5 to VCC +0.5  
-0.5 to VCC +0.5  
±10  
Unit  
V
VCC  
DC Supply Voltage (Referenced to GND)  
DC Input Voltage (Referenced to GND)  
DC Output Voltage (Referenced to GND)  
DC Input Current, per Pin  
V
IN  
V
VOUT  
IIN  
V
mA  
PD  
Power Dissipation in Still Air, Plastic DIP+  
SOIC Package+  
500*1  
100  
mW  
mW  
Power Dissipation per Output Transistor  
Storage Temperature  
P
tot  
Tstg  
TL  
-65 to +150  
260  
°C  
°C  
Lead Temperature, 1 mm from Case for 10 Seconds  
(Plastic DIP or SOIC Package)  
*Maximum Ratings are those values beyond which damage to the device may occur.  
Functional operation should be restricted to the Recommended Operating Conditions.  
*1 For TA=-55 to 100°C (package plastic DIP), for TA=-55 to 65°C (package SOIC)  
+Derating - Plastic DIP: - 12 mW/°C from 100°Ñ to 125°C  
SOIC Package: : - 7 mW/°C from 65°Ñ to 125°C  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
Parameter  
Min  
3.0  
0
Max  
Unit  
V
VCC  
DC Supply Voltage (Referenced to GND)  
DC Input Voltage, Output Voltage (Referenced to GND)  
Operating Temperature, All Package Types  
18  
VCC  
V , VOUT  
IN  
V
TA  
-55  
+125  
°C  
This device contains protection circuitry to guard against damage due to high static voltages or electric  
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages  
to this high-impedance circuit. For proper operation, V and VOUT should be constrained to the range GND£(V or  
IN  
IN  
VOUT)£VCC.  
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused  
outputs must be left open.  
INTEGRAL  
2
IW4040B  
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)  
VCC  
Guaranteed Limit  
Symbol  
Parameter  
Test Conditions  
Unit  
125°  
C
V
-55°C  
25°C  
V
IH  
Minimum High-Level  
Input Voltage  
VOUT=0.5 V or VCC - 0.5 V  
VOUT=1.0 V or VCC - 1.0 V  
VOUT=1.5 V or VCC - 1.5 V  
5.0  
10  
15  
3.5  
7.0  
11.0  
3.5  
7.0  
11.0  
3.5  
7.0  
11.0  
V
V
Maximum Low -Level  
Input Voltage  
VOUT=0.5 V or VCC - 0.5 V  
VOUT=1.0 V or VCC - 1.0 V  
VOUT=1.5 V or VCC - 1.5 V  
5.0  
10  
15  
1.5  
3.0  
4.0  
1.5  
3.0  
4.0  
1.5  
3.0  
4.0  
V
V
V
IL  
VOH  
Minimum High-Level  
Output Voltage  
V = GND or VCC  
IN  
5.0  
10  
15  
4.95  
9.95  
14.95  
4.95  
9.95  
14.95  
4.95  
9.95  
14.95  
VOL  
Maximum Low-Level  
Output Voltage  
V = GND or VCC  
IN  
5.0  
10  
15  
0.05  
0.05  
0.05  
0.05  
0.05  
0.05  
0.05  
0.05  
0.05  
IIN  
Maximum Input Leakage  
Current  
V = GND or VCC  
18  
±0.1  
±0.1  
±1.0  
mA  
mA  
IN  
ICC  
Maximum Quiescent  
Supply Current  
(per Package)  
V = GND or VCC  
IN  
5.0  
10  
15  
20  
5
10  
20  
100  
5
10  
20  
100  
150  
300  
600  
3000  
IOL  
Minimum Output Low  
(Sink) Current  
V = GND or VCC  
mA  
mA  
IN  
UOL=0.4 V  
UOL=0.5 V  
UOL=1.5 V  
5.0  
10  
15  
0.64  
1.6  
4.2  
0.51  
1.3  
3.4  
0.36  
0.9  
2.4  
IOH  
Minimum Output High  
(Source) Current  
V = GND or VCC  
IN  
UOH=2.5 V  
UOH=4.6 V  
UOH=9.5 V  
UOH=13.5 V  
5.0  
5.0  
10  
-2.0  
-0.64  
-1.6  
-1.6  
-0.51  
-1.3  
-1.15  
-0.36  
-0.9  
15  
-4.2  
-3.4  
-2.4  
INTEGRAL  
3
IW4040B  
AC ELECTRICAL CHARACTERISTICS (CL=50 pF, RL=200 kW, tr=tf=20 ns)  
VCC  
V
Guaranteed Limit  
Symbol  
Parameter  
Unit  
-55°C  
25°C  
125°C  
fmax  
Maximum Clock Frequency (Figure 1)  
5.0  
10  
15  
3.5  
8
12  
3.5  
8
12  
1.75  
4.0  
6.0  
MHz  
ns  
tPLH, tPHL Maximum Propagation Delay, Clock to Q1 (Figure 1)  
tPLH, tPHL Maximum Propagation Delay, Qn to Qn+1 (Figure 2)  
5.0  
10  
15  
360  
160  
130  
360  
160  
130  
720  
320  
260  
5.0  
10  
15  
330  
80  
60  
330  
80  
60  
660  
160  
120  
ns  
tPHL  
Maximum Propagation Delay, Reset to Any Q  
(Figure 3)  
5.0  
10  
15  
280  
120  
100  
280  
120  
100  
560  
240  
200  
ns  
tTLH, tTHL Maximum Output Transition Time, Any Output  
(Figure 1)  
5.0  
10  
15  
200  
100  
80  
200  
100  
80  
400  
200  
160  
ns  
CIN  
Maximum Input Capacitance  
-
7.5  
pF  
TIMING REQUIREMENTS (CL=50 pF, RL=200 kW, tr=tf=20 ns)  
VCC  
V
Guaranteed Limit  
Symbol  
Parameter  
Unit  
-55°C  
25°C  
125°C  
tw  
Minimum Pulse Width, Clock (Figure 1)  
5.0  
10  
15  
140  
60  
40  
140  
60  
40  
280  
120  
80  
ns  
tw  
Minimum Pulse Width, Reset (Figure 3)  
Minimum Removal Time, Reset(Figure 3)  
5.0  
10  
15  
200  
80  
60  
200  
80  
60  
400  
160  
120  
ns  
ns  
ns  
trem  
5.0  
10  
15  
350  
150  
100  
350  
150  
100  
700  
300  
200  
tr, tf  
Maximum Input Rise and Fall Times, Clock (Figure 1) 5.0  
10  
15  
Unlimited  
Figure 1. Switching Waveforms  
Figure 2. Switching Waveforms  
INTEGRAL  
4
IW4040B  
VCC  
50%  
GND  
CLOCK  
RESET  
t
rem  
t
w
VCC  
50%  
GND  
t PHL  
VCC  
50%  
ANY Q  
GND  
Figure 3. Switching Waveforms  
TIMING DIAGRAM  
0
1
2
4
32  
2048 4096  
8
16  
128  
256 512 1024  
64  
Clock  
Reset  
Q1  
Q2  
Q3  
Q4  
Q5  
Q6  
Q7  
Q8  
Q9  
Q10  
Q11  
Q12  
EXPANDED LOGIC DIAGRAM  
Q1  
CL2  
Q2  
Q2  
CL3  
CL3  
Q11  
Q11  
CL1  
CL7  
Q12  
Q12  
FF1  
FF2  
FFI2  
CLOCK  
RESET  
CL1  
R
Q1  
Q1  
CL2  
R
CL7  
R
FF3-FF11  
Q12  
Q1  
Q11  
Q2  
Q3  
INTEGRAL  
5
IW4040B  
INTEGRAL  
6
IW4040B  
CHIP PAD DIAGRAM  
Chip marking  
4040  
11  
14  
15  
13  
12  
10  
16  
01  
09  
08  
02  
03  
06  
04  
07  
05  
Y
(0,0)  
2.28 + 0.03  
X
Location of marking (mm): left lower corner x=0.199, y=1.792.  
Chip thickness: 0.46 ± 0.02 (0.35 ± 0.02 ) mm.  
PAD LOCATION  
Location (left lower corner), mm  
Pad No  
Symbol  
Pad size, mm  
X
Y
01  
02  
03  
04  
05  
06  
07  
08  
09  
10  
11  
12  
13  
14  
15  
16  
Q12  
Q6  
0.1525  
0.1525  
0.4515  
0.8115  
1.1715  
1.5315  
2.0270  
2.0270  
2.0270  
2.0270  
1.8470  
1.2430  
0.9965  
0.4445  
0.1525  
0.1525  
0.9025  
0.2315  
0.1525  
0.1525  
0.1525  
0.1525  
0.3365  
0.7995  
1.0135  
1.4760  
1.7675  
1.7675  
1.7675  
1.7675  
1.5980  
1.2140  
0.100 x0.100  
0.100 x0.100  
0.100 x0.100  
0.100 x0.100  
0.100 x0.100  
0.100 x0.100  
0.100 x0.100  
0.100 x0.100  
0.100 x0.100  
0.100 x0.100  
0.100 x0.100  
0.100 x0.100  
0.100 x0.100  
0.100 x0.100  
0.100 x0.100  
0.100 x0.100  
Q5  
Q7  
Q4  
Q3  
Q2  
GND  
Q1  
INPUT  
RES  
Q9  
Q8  
Q10  
Q11  
VCC  
Note: Pad location is given as per passivation layer  
INTEGRAL  
7
厂商 型号 描述 页数 下载

INTEGRAL

IZ4027B 双JK触发器[ Dual JK Flip-Flop ] 6 页

ETC

IZ4053B 模拟多路复用器多路解复用器[ Analog Multiplexer Demultiplexer ] 8 页

ETC

IZ4436 智能221位EEPROM计数器\u003e 20000单位与安全逻辑和高安全性的身份验证[ Intelligent 221-Bit EEPROM Counter for > 20000 Units with Security Logic and High Security Authentication ] 2 页

INTEGRAL

IZ44780 点阵液晶显示控制器与驱动程序[ DOT MATRIX LIQUID CRYSTAL DISPLAY CONTROLLER & DRIVER ] 10 页

INTEGRAL

IZ44780-00 点阵液晶显示控制器与驱动程序[ DOT MATRIX LIQUID CRYSTAL DISPLAY CONTROLLER & DRIVER ] 10 页

INTEGRAL

IZ44780-01 点阵液晶显示控制器与驱动程序[ DOT MATRIX LIQUID CRYSTAL DISPLAY CONTROLLER & DRIVER ] 10 页

INTEGRAL

IZ44780-XX 点阵液晶显示控制器与驱动程序[ DOT MATRIX LIQUID CRYSTAL DISPLAY CONTROLLER & DRIVER ] 10 页

XPPOWER

IZ4803SA 直流 - 直流电源[ DC-DC Power Supplies ] 2 页

XPPOWER

IZ4805S 直流 - 直流电源[ DC-DC Power Supplies ] 2 页

XPPOWER

IZ4805SA 直流 - 直流电源[ DC-DC Power Supplies ] 2 页

PDF索引:

A

B

C

D

E

F

G

H

I

J

K

L

M

N

O

P

Q

R

S

T

U

V

W

X

Y

Z

0

1

2

3

4

5

6

7

8

9

IC型号索引:

A

B

C

D

E

F

G

H

I

J

K

L

M

N

O

P

Q

R

S

T

U

V

W

X

Y

Z

0

1

2

3

4

5

6

7

8

9

Copyright 2024 gkzhan.com Al Rights Reserved 京ICP备06008810号-21 京

0.206184s