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NYC0102BLT1G

型号:

NYC0102BLT1G

描述:

敏感栅硅控整流器[ Sensitive Gate Silicon Controlled Rectifiers ]

品牌:

ONSEMI[ ONSEMI ]

页数:

5 页

PDF大小:

97 K

NYC0102BLT1G  
Sensitive Gate  
Silicon Controlled Rectifiers  
Reverse Blocking Thyristors  
Designed and tested for highlysensitive triggering in low-power  
switching applications.  
http://onsemi.com  
Features  
High dv/dt  
0.25 AMP, 200 VOLT SCRs  
Gating Current < 200 mA  
Miniature SOT23 Package for High Density PCB  
This is a HalogenFree Device  
This is a PbFree Device  
G
A
K
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
Rating  
Symbol  
Value  
Unit  
MARKING  
DIAGRAM  
Peak Repetitive OffState Voltage (Note 1)  
V
V
DRM,  
RRM  
3
(R = IK, T = *40 to +110°C, Sine  
V
GK  
J
Wave, 50 to 60 Hz  
200  
1
On-State Current RMS  
(180° Conduction Angle, T = 80°C)  
I
0.25  
A
A
C2B MG  
T(RMS)  
2
C
G
SOT23  
Peak Non-repetitive Surge Current,  
T = 25°C, (1/2 Cycle, Sine Wave, 60 Hz)  
I
7.0  
TSM  
1
CASE 318  
STYLE 8  
A
2
2
Circuit Fusing Considerations (t = 8.3 ms)  
I t  
0.2  
0.1  
A s  
Forward Peak Gate Power  
(Pulse Width 1.0 msec, T = 25°C)  
P
GM  
W
W
A
C2B = Specific Device Code  
A
M
G
= Date Code*  
Forward Average Gate Power  
(t = 8.3 msec, T = 25°C)  
P
0.02  
0.5  
G(AV)  
FGM  
= PbFree Package  
(Note: Microdot may be in either location)  
A
Forward Peak Gate Current  
I
*Date Code orientation and/or overbar may vary de-  
pending upon manufacturing location.  
(Pulse Width 20 ms, T = 25°C)  
A
Reverse Peak Gate Voltage  
V
RGM  
8.0  
V
(Pulse Width 1.0 ms, T = 25°C)  
A
Operating Junction Temperature Range  
T
40 to  
°C  
°C  
J
PIN ASSIGNMENT  
@ Rated V  
and V  
+125  
RRM  
DRM  
1
2
3
Cathode  
Gate  
Storage Temperature Range  
T
stg  
40 to  
+150  
Anode  
THERMAL CHARACTERISTICS  
Characteristic  
Symbol  
Max  
Unit  
Total Device Dissipation FR5 Board  
T = 25°C  
A
P
D
ORDERING INFORMATION  
225  
380  
mW  
Device  
Package  
Shipping  
3000/Tape & Reel  
Thermal Resistance, JunctiontoAmbient  
R
°C/W  
q
JA  
NYC0102BLT1G  
SOT23  
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
(PbFree)  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specifications  
Brochure, BRD8011/D.  
1. V  
and V  
for all types can be applied on a continuous basis. Ratings  
DRM  
RRM  
apply for zero or negative gate voltage; however, positive gate voltage shall  
not be applied concurrent with negative potential on the anode. Blocking  
voltages shall not be tested with a constant current source such that the  
voltage ratings of the devices are exceeded.  
© Semiconductor Components Industries, LLC, 2008  
1
Publication Order Number:  
December, 2008 Rev. 0  
NYC0102BL/D  
 
NYC0102BLT1G  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted.)  
C
Characteristic  
OFF CHARACTERISTICS  
Symbol  
Min  
Typ  
Max  
Unit  
Peak Repetitive Forward Blocking Current  
I
DRM  
RRM  
(V  
= 200 V, R = 1 kW)  
T
C
= 25°C  
C
1.0  
mA  
mA  
DRM  
GK  
T
= 125°C  
100  
Peak Repetitive Reverse Blocking Current  
(V = 200 V, R = 1 kW)  
I
T
C
= 25°C  
1.0  
100  
mA  
mA  
DRM  
GK  
C
T
= 125°C  
ON CHARACTERISTICS  
Peak Forward OnState Voltage  
V
1.7  
200  
0.8  
6.0  
V
mA  
V
TM  
(I = 0.4 A, t < 1 ms, T = 25°C)  
TM  
p
C
Gate Trigger Current  
(V = 12 V, R = 100 W, T = 25°C)  
I
GT  
D
L
C
Gate Trigger Voltage  
V
GT  
(V = 12 V, R = 100 W, T = 25°C)  
D
L
C
Holding Current  
I
mA  
V
H
(I = 50 mA, R = 1 kW, T = 25°C)  
T
GK  
C
Gate NonTrigger Voltage  
(V = V , R = 3.3 kW, T = 125°C)  
V
GD  
0.1  
D
DRM  
L
C
Latching Current  
(I = 1.0 mA, R = 1 kW, T = 25°C)  
I
7.0  
mA  
V
L
G
GK  
C
Gate Reverse Voltage  
(I = 10 mA)  
V
RG  
8.0  
RG  
DYNAMIC CHARACTERISTICS  
Critical Rate of Rise of OffState Voltage  
dv/dt  
di/dt  
200  
V/ms  
A/ms  
(R = 1 kW, T = 125°C)  
GK  
C
Critical Rate of Rise of OnState Current  
50  
(I = 2xI 60 Hz, t < 100 ns, T = 125°C)  
G
GT  
r
J
Voltage Current Characteristic of SCR  
+ Current  
Anode +  
V
TM  
Symbol  
Parameter  
V
Peak Repetitive Off State Forward Voltage  
Peak Forward Blocking Current  
Peak Repetitive Off State Reverse Voltage  
Peak Reverse Blocking Current  
Peak on State Voltage  
DRM  
DRM  
on state  
I
I
H
I
at V  
RRM  
RRM  
V
RRM  
RRM  
I
V
TM  
+ Voltage  
I
H
Holding Current  
I
at V  
DRM  
Reverse Blocking Region  
(off state)  
DRM  
Forward Blocking Region  
(off state)  
Reverse Avalanche Region  
Anode −  
http://onsemi.com  
2
NYC0102BLT1G  
0.25  
0.2  
0.15  
0.1  
0.05  
0
0.3  
0.25  
0.2  
DC  
0.15  
180°  
0.1  
0.05  
0
0
0.05  
0.1  
0.15  
0.2  
0
50  
100  
150  
I , AVERAGE CURRENT (A)  
T
T, TEMPERATURE (°C)  
Figure 2. Current Derating  
Figure 1. Maximum Average Power vs.  
Average Current  
7
6
5
4
3
2
1
0
1
0.8  
0.6  
0.4  
0.2  
0
1.E04 1.E03 1.E02 1.E011.E+00 1.E+01 1.E+02 1.E+03  
1
10  
100  
1000  
NUMBER OF CYCLES  
PULSE DURATION (s)  
Figure 3. Surge Current ITSM vs. Number of  
Cycles  
Figure 4. Thermal Response  
10  
2
Gate  
1.5  
Open  
R
= 1k  
GK  
1
1
125°C  
25°C  
0.5  
0
0.1  
0
0.5  
1
1.5  
, (V)  
2
2.5  
200  
250  
300  
T , (K)  
350  
400  
V
TM  
J
Figure 5. ONState Characteristics  
Figure 6. Gate Trigger Current vs. TJ  
(Normalized to 255C)  
http://onsemi.com  
3
NYC0102BLT1G  
0.07  
0.06  
2
Gate  
Open  
1.5  
0.05  
0.04  
0.03  
0.02  
R
= 1k  
GK  
1
0.5  
0
0.01  
0
200  
250  
300  
T , (K)  
350  
400  
0
2
4
6
8
10  
12  
R
, (kW)  
GK  
J
Figure 7. Gate Trigger Current vs. TJ  
Figure 8. Gate Trigger Current vs. RGK  
(Normalized to 255C)  
0.2  
2000  
0.15  
0.1  
1500  
1000  
0.05  
0
500  
0
0
2
4
6
8
10  
12  
0
2
4
6
8
10  
12  
R
, (kW)  
R
, (kW)  
GK  
GK  
Figure 9. Holding and Latching Current vs.  
RGK  
Figure 10. dV/dt vs. RGK  
1.0  
0.80  
0.60  
0.40  
0.20  
0
200  
250  
300  
T , (K)  
350  
400  
J
Figure 11. Gate Triggering Voltage vs. TJ  
http://onsemi.com  
4
NYC0102BLT1G  
PACKAGE DIMENSIONS  
SOT23 (TO236)]  
CASE 31808  
ISSUE AN  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
2. CONTROLLING DIMENSION: INCH.  
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD  
FINISH THICKNESS. MINIMUM LEAD  
THICKNESS IS THE MINIMUM THICKNESS OF  
BASE MATERIAL.  
D
SEE VIEW C  
3
4. 31801 THRU 07 AND 09 OBSOLETE, NEW  
STANDARD 31808.  
H
E
E
MILLIMETERS  
INCHES  
DIM  
A
A1  
b
c
D
E
e
L
L1  
MIN  
0.89  
0.01  
0.37  
0.09  
2.80  
1.20  
1.78  
0.10  
0.35  
2.10  
NOM  
1.00  
0.06  
0.44  
0.13  
2.90  
1.30  
1.90  
0.20  
0.54  
2.40  
MAX  
MIN  
NOM  
0.040  
0.002  
0.018  
0.005  
0.114  
0.051  
0.075  
0.008  
0.021  
0.094  
MAX  
0.044  
0.004  
0.020  
0.007  
0.120  
0.055  
0.081  
0.012  
0.029  
0.104  
c
1.11  
0.10  
0.50  
0.18  
3.04  
1.40  
2.04  
0.30  
0.69  
2.64  
0.035  
0.001  
0.015  
0.003  
0.110  
0.047  
0.070  
0.004  
0.014  
0.083  
1
2
b
0.25  
e
q
A
H
E
L
A1  
STYLE 8:  
L1  
VIEW C  
PIN 1. ANODE  
2. NO CONNECTION  
3. CATHODE  
SOLDERING FOOTPRINT*  
0.95  
0.037  
0.95  
0.037  
2.0  
0.079  
0.9  
0.035  
0.8  
0.031  
mm  
inches  
ǒ
Ǔ
SCALE 10:1  
*For additional information on our PbFree strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
N. American Technical Support: 8002829855 Toll Free  
USA/Canada  
Europe, Middle East and Africa Technical Support:  
Phone: 421 33 790 2910  
Japan Customer Focus Center  
Phone: 81357733850  
ON Semiconductor Website: www.onsemi.com  
Order Literature: http://www.onsemi.com/orderlit  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 3036752175 or 8003443860 Toll Free USA/Canada  
Fax: 3036752176 or 8003443867 Toll Free USA/Canada  
Email: orderlit@onsemi.com  
For additional information, please contact your local  
Sales Representative  
NYC0102BL/D  
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