CYV270M0101EQ
equalizer’s input, or it controls the muting of the equalizer’s
output.
SDO, SDO
The CYV270M0101EQ has differential serial output interface
drivers that use current mode logic [CML] drivers to provide
source matching for the transmission line. These outputs can
be either AC coupled or DC coupled to the HOTLink II SerDes
device.
If CD/MUTE is used as an output, and the incoming data
stream is not present, the voltage at the CD/MUTE output will
be greater than 2.9V. If CD/MUTE is used as an output, and
the incoming data stream is present, then the voltage at the
CD/MUTE output will be less than 0.8V.
If CD/MUTE is used as an input, and tied to ground, the
equalizer serial outputs are not muted and the MCLADJ
setting is overwritten. If the CD/MUTE is used as an input and
CLI
Cable Length Indicator (CLI) is an analog output that gives an
output voltage proportional to the cable length being
equalized. CLI gives an approximation of the length of cable
at the differential serial inputs (SDI, SDI). CLI works at
standard definition (SD) data rates. The graph in Figure 2 illus-
trates the CLI output voltage at various Belden 1694A cable
lengths. With an increase in cable length, CLI output voltage
decreases.
is tied to V , then the equalizer serial outputs are muted and
CC
the MCLADJ setting is overwritten.
When an invalid signal or a signal transmitted with a launch
amplitude of less than 500mV at SD data-rates is received, the
equalizer’s serial outputs are muted and the MCLADJ setting
is overwritten.
BYPASS
MCLADJ
The CYV270M0101EQ has a bypass mode that allows the
user to bypass the equalizer’s equalization and DC restoration
Maximum Cable Length Adjust (MCLADJ) sets the approx-
imate maximum amount of cable to be equalized. When the
maximum cable length set by MCLADJ is reached, the outputs
are muted.
functions. When the Bypass mode is tied to V , the signal
CC
presented at the equalizer’s differential serial inputs (SDI, SDI)
is routed to the equalizer’s differential serial outputs (SDO,
SDO) without performing equalization.
If the MCLADJ voltage is greater than the CLI output voltage,
the equalizer serial differential outputs (SDO, SDO) are muted.
If the MCLADJ voltage is less than CLI voltage, then the
equalizer’s differential serial outputs (SDO, SDO) are not
muted and the incoming data stream is equalized. The graph
in Figure 1 illustrates the voltage needed at MCLADJ input, to
equalize various Belden 1694A cable lengths for SD data
rates. The MCLADJ pin can be left unconnected in applica-
tions that do not require muting of the outputs.
When BYPASS is tied to GND, the incoming video data stream
is equalized and presented at the equalizer‘s differential serial
outputs (SDO, SDO).
In equalizer bypass mode, CD/MUTE is not functional.
AGC
A capacitor of 1 µF should be placed between the AGC± pins
of the CYV270M0101EQ equalizer.
CD/MUTE
Carrier Detect/MUTE (CD/MUTE) is a bidirectional pin that
provides an indication of the signal being present at the
Document #: 001-06830 Rev. *A
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