ZXLD1100
DEVICE DESCRIPTION
The device is a PFM flyback dc-dc boost converter,
working in discontinuous m ode.
Filtered PWM operation
The input of an internal low pass filter is switched to
VREF when the EN pin is high and switched to ground
when the EN pin is low. The output of this filter drives
the com parator within the control loop. A continuous
high state on EN therefore provides a filtered voltage of
value VREF to the com parator. However, by varying the
duty cycle of the EN signal at a suitably high frequency
(f>10kHz), the control loop will see a voltage, that has
an average value equal to the duty cycle m ultiplied by
With reference to the chip block diagram and typical
application circuit, the operation of the device is as
follows:
Control loop
When 'EN' is high, the control circuits becom e active
and the low side of the coil (L1) is switched to ground
via NDMOS transistor (MN). The current in L1 is
allowed to build up to an internally defined level
(nom inally 320m A) before MN is turned off. The energy
stored in L1 is then transferred to the output capacitor
(C2) via schottky diode (D1). When the voltage on C2
has risen above the threshold voltage of the series
connected LEDs, current will flow through external
sense resistor R1. The voltage developed across R1 is
sensed at pin 'FB' and com pared to a 100m V reference
vo lta g e (VREF). A co m p a ra to r s e n s e s w h e n th e
feedback voltage is above VREF and its output is used to
control the 'off' tim e of the output switch. The control
loop is self-oscillating, producing pulses of up to 5s
m axim um duration (switch 'on'), at a frequency that
varies in proportion to the LED current. The feedback
loop m aintains a voltage of VREF at the FB pin and
therefore defines a m axim um LED current equal to VREF
divided by R1. The m inim um 'off' tim e of the output
switch is fixed at 0.5s nom inal, to allow tim e for the
coil's energy to be dissipated before the switch is
turned on again. This m aintains stable and efficient
operation in discontinuous m ode.
VREF. This provides a m eans of adjusting the output
current to a lower value. It also allows the device to be
both turned on and adjusted with a single signal at the
'EN' pin. The output during this m ode of operation will
be a dc current equal to (VREF/R1) x duty cycle
Gated PWM operation
The internal circuitry of the ZXLD1100 is turned off
when no signal is present on the 'EN' pin for m ore than
120s (nom inal). A low frequency signal applied to the
EN pin will therefore gate the device 'on' and 'off' at the
gating frequency and the duty cycle of this signal can
be varied to provide a 'chopped' output current equal
to (VREF/R1) x duty cycle. For best accuracy, the gating
frequency should be m ade as low as possible (e.g.
below 1kHz), such that the turn off delay of the chip is
only a sm all proportion of the gating period
Further details of setting output current are given in the
applications section under brightness control.
Open circuit protection
There is an internal avalanche diode between the
VSENSE and FB pins of the device. This diode, together
with the associated resistors provides open circuit
protection when the VSENSE pin is connected to the
o u tp u t vo lta g e . In th e e ve n t o f a n o p e n circu it
condition, the output voltage will rise above the
breakdown voltage of the internal diode, which will
then conduct and override the control signal from the
current sense resistor. This m aintains the output
voltage at a level below the breakdown voltage of the
output switch. Supply current in this condition will fall
to a low value as the control loop provides only the bias
current for the diode.
ISSUE 4 - J ULY 2004
S E M IC O N D U C T O R S
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