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TXS4555

型号:

TXS4555

描述:

1.8V / 3V SIM卡电源,具有电平转换器[ 1.8V/3V SIM Card Power Supply With Level Translator ]

品牌:

TI[ TEXAS INSTRUMENTS ]

页数:

16 页

PDF大小:

578 K

TXS4555  
www.ti.com  
SBOS550A FEBRUARY 2011REVISED MARCH 2011  
1.8V/3V SIM Card Power Supply With Level Translator  
Check for Samples: TXS4555  
1
FEATURES  
RGT Package  
(Top View)  
Level Translator  
VCC Range of 1.65 V to 3.3 V  
VBATT Range from 2.3 to 5.5V  
Low-Dropout (LDO) Regulator  
50-mA LDO Regulator With Enable  
1
2
3
4
12  
11  
10  
9
NC  
EN  
1.8-V or 2.95-V Selectable Output Voltage  
2.3-V to 5.5-V Input Voltage Range  
SIMCLK  
GND  
SEL  
VCC  
Exposed  
Thermal Pad  
Very Low Dropout: 100mV (Max) at 50mA  
Incorporates Shutdown Feature for the SIM  
Card Signals According to ISO-7816-3  
SIMRST  
NC  
ESD Protection Exceeds JESD 22  
2000-V Human-Body Model (A114-B)  
500-V Charged-Device Model (C101)  
8kV HBM for SIM Pins  
Package  
Note: The Exposed center thermal pad must be  
connected to Ground  
16-Pin QFN (3 mm x 3 mm)  
12-Pin QFN (2mm x 1.7mm)  
RUT Package  
(Top View)  
DESCRIPTION  
The TXS4555 is a complete Smart Identity Module  
(SIM) card solution for interfacing wireless baseband  
processors with a SIM card to store I/O for mobile  
handset applications. The device complies with  
ISO/IEC Smart-Card Interface requirements as well  
as GSM and 3G mobile standards. It includes a  
high-speed level translator capable of supporting  
Class-B (2.95 V) and Class-C (1.8 V) interfaces, a  
low-dropout (LDO) voltage regulator that has output  
voltages that are selectable between 2.95-V Class-B  
and 1.8-V Class-C interfaces.  
12  
6
SEL  
GND  
The device has two supply voltage pins. VCC can be operated over the full range of 1.65 V to 3.3 V and VBATT  
from 2.3 to 5.5 V. VPWR is set to either 1.8 V or 2.95 V and is supplied by an internal LDO. The integrated LDO  
accepts input voltages as high as 5.5 V and outputs either 1.8 V or 2.95 V at 50 mA to the B-side circuitry and to  
the external SIM card. The TXS4555 enables system designers to easily interface low-voltage microprocessors  
to SIM cards operating at 1.8 V or 2.95 V.  
The TXS4555 also incorporates shutdown sequence for the SIM card pins based on the ISO 7816-3 specification  
for SIM cards. Proper shutdown of the SIM card signals helps in prevention of corruption of data during  
accidental shutdown of the phone. The device also has 8kV HBM protection for the SIM pins and standard 2kV  
HBM protection for all the other pins.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2011, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
TXS4555  
SBOS550A FEBRUARY 2011REVISED MARCH 2011  
www.ti.com  
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with  
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.  
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more  
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.  
ORDERING INFORMATION(1)  
ORDERABLE PART  
TA  
PACKAGE(2)  
TOP-SIDE MARKING  
NUMBER  
QFN RGT (pin 1, quadrant 1)  
QFN RUT (pin 1, quadrant 1)  
TXS4555RGTR  
TXS4555RUTR  
TBD  
TBD  
40°C to 85°C  
Tape and reel  
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
web site at www.ti.com.  
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.  
VBATT  
(2.3 to 5.5 V)  
Core Supply  
VCC (1.65 to 3.3 V)  
2.95 V or 1.8 V,  
50 mA  
Vcc  
RST  
CLK  
NC  
GND  
Vpp  
I/O  
LDO  
Baseband  
Reset  
CLK  
Translator  
NC  
I/O  
Figure 1. Interfacing with SIM Card  
PIN FUNCTIONS  
PIN NO.  
PIN NAME  
TYPE(1)  
DESCRIPTION  
RGT  
RUT  
EN  
1
11  
I
Enable/disable control input. Pull EN low to place all outputs in Hi-Z state and to disable the  
LDO. Referenced to VCC.  
SEL  
2
3
12  
1
I
P
Pin to program VSIM value (Low = 1.8V, High = 2.95V)  
Power supply voltage which powers all A-port I/Os and control inputs  
Battery power supply  
Vcc  
VBATT  
VSIM  
SIM_I/O  
SIM_RST  
GND  
5
2
P
7
3
O
I/O  
O
G
O
I
SIM card Power-Supply pin (1.8V or 2.95V)  
8
4
Bidirectional SIM I/O pin which connected to I/O pin of the SIM card connector  
SIM Reset pin which connects to RESET pin of the SIM card connector  
Ground  
9
5
10  
11  
13  
14  
15  
6
SIM_CLK  
CLK  
7
Clock signal pin which connects to CLK pin of the SIM card connector  
Clock signal pin connected from baseband processor  
SIM Reset pin connected from baseband processor  
Bidirectional SIM I/O pin which connected from baseband processor  
No Connects  
8
RST  
9
I
I/O  
10  
I/O  
NC  
NC  
4, 6, 12,  
16  
(1) G = Ground, I = Input, O = Output, P = Power  
2
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Copyright © 2011, Texas Instruments Incorporated  
Product Folder Link(s): TXS4555  
TXS4555  
www.ti.com  
SBOS550A FEBRUARY 2011REVISED MARCH 2011  
Figure 2. Block Diagram  
V
BATT  
Cin = 1 mF  
V
SIM  
Vref  
R
1
Cout = 1 mF  
R
2
GND  
Figure 3. Block Diagram of the LDO  
Copyright © 2011, Texas Instruments Incorporated  
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Product Folder Link(s): TXS4555  
TXS4555  
SBOS550A FEBRUARY 2011REVISED MARCH 2011  
www.ti.com  
EN  
SIM_RST  
SIM_CLK  
Active Data  
SIM_I/O  
VSIM  
Figure 4. Shutdown Sequence for SIM_RST, SIM_CLK, SIM_IO and VSIM  
The shutdown sequence for the SIM signals is based on the ISO 7816-3 specification. The shutdown sequence  
of these signals helps to properly disable these channels and not have any corruption of data accidently. Also,  
this is also helpful when the SIM card is present in a hot swap slot and when pulling out the SIM card, the orderly  
shutdown of these signals help avoid any improper write/corruption of data.  
When EN is taken low, the shutdown sequence happens by powering of the SIM_RST channel. Once that is  
achieved, SIM_CLK, SIM_I/O and VSIM are powered sequentially one by one. There is an internal 2K pull-down  
value on the SIM pins and helps to pull these channels low. The shutdown time sequence is in the order of a few  
microseconds. It is important that EN is taken low before VBAT and VCC supplies go low so that the shutdown  
sequence can be initiated properly.  
4
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Copyright © 2011, Texas Instruments Incorporated  
Product Folder Link(s): TXS4555  
TXS4555  
www.ti.com  
SBOS550A FEBRUARY 2011REVISED MARCH 2011  
ABSOLUTE MAXIMUM RATINGS(1)  
over operating free-air temperature range (unless otherwise noted)  
VALUE  
UNIT  
MIN  
MAX  
LEVEL TRANSLATOR  
VCC  
Supply voltage range  
0.3  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
4.0  
4.6  
V
V
VCC-port  
VI  
Input voltage range  
SIM-port  
4.6  
Control inputs  
VCC -port  
4.6  
4.6  
Voltage range applied to any output in the  
high-impedance or power-off state  
VO  
VSIM-port  
Control inputs  
VCC-port  
4.6  
V
V
4.6  
4.6  
Voltage range applied to any output in the  
high or low state  
VO  
SIM-port  
4.6  
Control inputs  
VI < 0  
4.6  
IIK  
IOK  
IO  
Input clamp current  
50  
50  
±50  
±100  
150  
mA  
mA  
mA  
mA  
°C  
Output clamp current  
VO < 0  
Continuous output current  
Continuous current through VCCA or GND  
Storage temperature range  
Tstg  
65  
LDO  
VBAT Input voltage range  
0.3  
0.3  
TBD  
6
6
V
V
VOUT  
Output voltage range  
Peak output current  
mA  
Continuous total power dissipation  
Junction temperature range  
Storage temperature range  
TBD  
150  
150  
2
TJ  
55  
55  
°C  
°C  
kV  
V
Tstg  
Human-Body Model (HBM)  
Charged-Device Model (CDM)  
Human-Body Model (HBM)  
ESD rating (host side)  
ESD rating (SIM side)  
500  
8
kV  
(1) Stresses beyond those listed under absolute maximum ratingsmay cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating  
conditionsis not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
THERMAL INFORMATION  
TXS4555  
THERMAL METRIC(1)  
RGT  
16 PINS  
47  
RUT  
12 PINS  
87.2  
UNITS  
θJA  
θJB  
ψJT  
Junction-to-ambient thermal resistance  
Junction-to-board thermal resistance  
25.12  
1.3  
N/A  
°C/W  
Junction-to-top characterization parameter  
1.7  
θJCbot Junction-to-case (bottom) thermal resistance  
3.6  
n/A  
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.  
RECOMMENDED OPERATING CONDITIONS(1)  
MIN  
MAX UNIT  
LEVEL TRANSLATOR  
VCC Supply voltage  
1.65  
3.3  
V
(1) All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report,  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
Copyright © 2011, Texas Instruments Incorporated  
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TXS4555  
SBOS550A FEBRUARY 2011REVISED MARCH 2011  
www.ti.com  
MAX UNIT  
RECOMMENDED OPERATING CONDITIONS(1) (continued)  
MIN  
CC × 0.7  
0
VIH  
VIL  
High-level input voltage  
Low-level input voltage  
V
VCC  
CC × 0.3  
5
V
V
EN, SEL  
V
Δt/Δv Input transition rise or fall rate  
TA Operating free-air temperature  
ns/V  
°C  
40  
85  
ELECTRICAL CHARACTERISTICS LEVEL TRANSLATOR  
over recommended operating free-air temperature range (unless otherwise noted)  
PARAMETER  
SIM_RST  
SIM_CLK  
SIM_I/O  
I/O  
TEST CONDITIONS  
IOH = 1mA  
VCC  
VSIM  
MIN TYP(1)  
SIM × 0.8  
MAX UNIT  
(2)  
(2)  
(2)  
1.65 V to 3.3 V 1.8 V / 2.95 V  
1.65 V to 3.3 V 1.8 V / 2.95 V  
1.65 V to 3.3 V 1.8 V / 2.95 V  
V
V
V
V
IOH = 1mA  
SIM × 0.8  
SIM × 0.8  
VOH  
IOH = 20 µA  
IOH = 20 µA  
IOL = 1 mA  
VCC × 0.8  
SIM_RST  
SIM_CLK  
SIM_I/O  
I/O  
V
SIM × 0.2  
SIM × 0.2  
0.3  
V
IOL = 1mA  
V
VOL  
IOL = 1 mA  
IOL = 1 mA  
0.3  
II  
Control inputs  
I/O  
VI = EN, 1.8V/3V  
VI = VCCI, IO = 0  
±1  
µA  
µA  
pF  
ICC  
1.65 V to 3.3 V 1.8 V / 2.95 V(2)  
±5  
I/O port  
8
4
4
Cio  
Ci  
SIM ports  
Control inputs  
VI = VCC or GND  
pF  
(1) All typical values are at TA = 25°C.  
(2) (Supplied by LDO)  
LDO ELECTRICAL CHARACTERISTICS  
PARAMETER  
TEST CONDITIONS  
MIN TYP(1) MAX UNIT  
VBAT  
VSIM  
Input voltage  
2.3  
2.85  
1.7  
5.5  
V
V
Output voltage  
Class-B Mode (SEL = VCC  
)
2.95 3.05  
Class-C Mode (SEL = 0)  
IOUT = 50 mA  
1.8  
1.9  
VDO  
IGND  
Dropout voltage  
100 mV  
Ground-pin current  
IOUT = 0 mA  
35 µA  
Shutdown current  
(IGND)  
ISHDN  
VENx 0.4 V, (VSIM + VDO) VBAT 5.5 V, TJ = 85°C  
3.5 µA  
IOUT(SC)  
COUT  
Short-circuit current  
Output Capacitor  
RL = 0 Ω  
145  
1
mA  
µF  
f = 1 kHz  
50  
40  
VBAT = 3.25 V, VSIM = 1.8 V or 2.95 V,  
COUT = 1 µF, IOUT = 50 mA  
Power-supply rejection  
ratio  
PSRR  
dB  
f = 10 kHz  
TSTR  
TJ  
Start-up time  
VSIM = 1.8 V or 2.95 V, IOUT = 50 mA, COUT = 1 µF  
400 µS  
125 °C  
Operating junction  
temperature  
40  
(1) All typical values are at TA = 25°C.  
GENERAL ELECTRICAL CHARACTERISTICS  
over operating free-air temperature range (unless otherwise noted)  
PARAMETER  
I/O pull-up  
TEST CONDITIONS  
MIN TYP MAX UNIT  
RI/OPU  
16  
10  
20  
14  
24 kΩ  
18 kΩ  
RSIMPU  
SIM_I/O pull-up  
6
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Copyright © 2011, Texas Instruments Incorporated  
Product Folder Link(s): TXS4555  
 
TXS4555  
www.ti.com  
SBOS550A FEBRUARY 2011REVISED MARCH 2011  
GENERAL ELECTRICAL CHARACTERISTICS (continued)  
over operating free-air temperature range (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN TYP MAX UNIT  
Active pull-downs are connected to the VSIM regulator output to the  
SIM_CLK, SIM_RST, SIM_I/O when EN = 0  
RSIMPD  
SIM_I/O pull-down  
3
kΩ  
SWITCHING CHARACTERISTICS  
over recommended operating free-air temperature range (unless otherwise noted)  
VCC = 1.8 V ± 0.15 V  
UNIT  
PARAMETER  
TEST CONDITIONS  
MIN  
MAX  
VSIM = 1.8 V or 2.95 V SUPPLIED BY INTERNAL LDO  
trA  
SIM_I/O  
SIM_RST  
SIM_CLK  
SIM_I/O  
1
1
µs  
µs  
trB  
18 ns  
CL = 50 pF  
1
us  
fmax  
SIM_CLK  
SIM_CLK  
25 MHz  
60%  
Duty Cycle  
40%  
OPERATING CHARACTERISTICS  
TA = 25°C, VSIM = 1.8 V  
Vcc TYP  
UNIT  
PARAMETER  
TEST CONDITIONS  
1.8 V  
13  
Class B  
(1)  
CpdA  
CL = 0, f = 5 MHz, tr = tf = 1 ns  
pF  
Class C  
11  
(1) Power dissipation capacitance per transceiver.  
Copyright © 2011, Texas Instruments Incorporated  
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TXS4555  
SBOS550A FEBRUARY 2011REVISED MARCH 2011  
www.ti.com  
TYPICAL CHARACTERISTICS  
110  
-90  
VBAT = 3.25 V,  
= 50 mA  
V
= 5.5 V  
BAT  
100  
90  
I
-80  
-70  
-60  
LOAD  
1.8 V Vsim  
85°C Vsim  
80  
70  
25°C Vsim  
2.95 V Vsim  
-50  
-40  
-30  
-20  
60  
50  
40  
30  
20  
-40°C Vsim  
-10  
0
10  
0
100  
1k  
10k  
100k  
1M  
0
5
10 15 20  
25 30 35 40 45 50  
f - Frequency - Hz  
I
Output Current - mA  
OUT  
Figure 5. PSRR  
Figure 6. Dropout Voltage vs Output Current  
1
0.8  
0.6  
0
I
= 50 mA  
O
-0.2  
-0.4  
0.4  
0.2  
-100 mA, Vism  
-40°C Vsim  
-0.6  
-0.8  
-1  
0
-0.2  
-0.4  
-0.6  
-0.8  
-1  
85°C Vsim  
-1.2  
-1.4  
-1.6  
-1.2  
-1.4  
-1.6  
-1.8  
-50 mA, Vism  
25°C Vsim  
-2  
-2.2  
-1.8  
-2  
-2.4  
-40 -30 -20 -10  
0
10 20 30 40 50 60 70 80  
- Temperature - °C  
0
5
10 15 20  
25 30 35 40 45 50  
T
I
Output Current - mA  
A
OUT  
Figure 7. Output Voltage vs Temperature, Class-B/C  
Figure 8. Load Regulation, Iout = 50 mA, Class-C  
8
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TXS4555  
www.ti.com  
SBOS550A FEBRUARY 2011REVISED MARCH 2011  
APPLICATION INFORMATION  
The LDOs included on the TXS4555 achieve ultra-wide bandwidth and high loop gain, resulting in extremely  
high PSRR at very low headroom (VBAT VSIM). The TXS4555 provides fixed regulation at 1.8V or 2.95V. Low  
noise, enable, low ground pin current make it ideal for portable applications. The device offers sub-bandgap  
output voltages, current limit and thermal protection, and is fully specified from 40°C to 125°C.  
VSIM  
V
CC  
TXS4555  
VBAT  
1 mF  
GND  
1 mF  
0.1 mF  
Figure 9. Typical Application Circuit for TXS4555  
INPUT AND OUTPUT CAPACITOR REQUIREMENTS  
It is good analog design practice to connect a 1.0 µF low equivalent series resistance (ESR) capacitor across the  
input supply (VBAT) near the regulator. Also, a 0.1µF is required for the logic core supply (VDDIO).  
This capacitor will counteract reactive input sources and improve transient response, noise rejection, and ripple  
rejection. A higher-value capacitor may be necessary if large, fast rise-time load transients are anticipated or if  
the device is located several inches from the power source. The LDOs are designed to be stable with standard  
ceramic capacitors of values 1.0 µF or larger. X5R- and X7R-type capacitors are best because they have  
minimal variation in value and ESR over temperature. Maximum ESR should be < 1.0 Ω.  
OUTPUT NOISE  
In most LDOs, the bandgap is the dominant noise source. To improve ac performance such as PSRR, output  
noise, and transient response, it is recommended that the board be designed with separate ground planes for VIN  
and VOUT, with each ground plane connected only at the GND pin of the device. In addition, the ground  
connection for the bypass capacitor should connect directly to the GND pin of the device.  
INTERNAL CURRENT LIMIT  
The TXS4555 internal current limit helps protect the regulator during fault conditions. During current limit, the  
output sources a fixed amount of current that is largely independent of output voltage. For reliable operation, the  
device should not be operated in a current limit state for extended periods of time.  
The PMOS pass element in the TXS4555 has a built-in body diode that conducts current when the voltage at  
VSIM exceeds the voltage at VBAT. This current is not limited, so if extended reverse voltage operation is  
anticipated, external limiting may be appropriate.  
DROPOUT VOLTAGE  
The TXS4555 uses a PMOS pass transistor to achieve low dropout. When (VBAT VSIM) is less than the dropout  
voltage (VDO), the PMOS pass device is in its linear region of operation and the input-to-output resistance is the  
RDS(ON) of the PMOS pass element. VDO will approximately scale with output current because the PMOS device  
behaves like a resistor in dropout.  
STARTUP  
The TXS4555 uses a quick-start circuit which allows the combination of very low output noise and fast start-up  
times.  
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TXS4555  
SBOS550A FEBRUARY 2011REVISED MARCH 2011  
www.ti.com  
TRANSIENT RESPONSE  
As with any regulator, increasing the size of the output capacitor reduces over/undershoot magnitude but  
increases duration of the transient response.  
MINIMUM LOAD  
The TXS4555 is stable and well-behaved with no output load. Traditional PMOS LDO regulators suffer from  
lower loop gain at very light output loads. The TXS4555 employs an innovative low-current mode circuit to  
increase loop gain under very light or no-load conditions, resulting in improved output voltage regulation  
performance down to zero output current.  
THERMAL INFORMATION  
Thermal Protection  
Thermal protection disables the output when the junction temperature rises to approximately +160°C, allowing  
the device to cool. When the junction temperature cools to approximately +140°C the output circuitry is again  
enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection  
circuit may cycle on and off. This cycling limits the dissipation of the regulator, protecting it from damage  
because of overheating.  
Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate  
heat sink. For reliable operation, junction temperature should be limited to +125°C maximum. To estimate the  
margin of safety in a complete design (including heat sink), increase the ambient temperature until the thermal  
protection is triggered; use worst-case loads and signal conditions. For good reliability, thermal protection should  
trigger at least +35°C above the maximum expected ambient condition of your particular application. This  
configuration produces a worst-case junction temperature of +125°C at the highest expected ambient  
temperature and worst-case load.  
The internal protection circuitry of the TXS4555 has been designed to protect against overload conditions. It was  
not intended to replace proper heat sinking. Continuously running the TXS4555 into thermal shutdown will  
degrade device reliability.  
10  
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PACKAGE OPTION ADDENDUM  
www.ti.com  
4-Apr-2011  
PACKAGING INFORMATION  
Status (1)  
Eco Plan (2)  
MSL Peak Temp (3)  
Samples  
Orderable Device  
Package Type Package  
Drawing  
Pins  
Package Qty  
Lead/  
Ball Finish  
(Requires Login)  
TXS4555RGTR  
TXS4555RUTR  
ACTIVE  
QFN  
RGT  
RUT  
16  
12  
3000  
3000  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-2-260C-1 YEAR  
PREVIEW  
UQFN  
TBD  
Call TI  
Call TI  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 1  
IMPORTANT NOTICE  
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