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VTM48EH020X040A00

型号：

VTM48EH020X040A00

描述：

当前MULTIPLIER[ Current Multiplier ]

品牌：

VICOR[ VICOR CORPORATION ]

页数：

16 页

PDF大小：

1867 K

下载PDF手册
VTM48EH020 x 040A00  
(Formerly VIV0103THJ)  
TM  
VTM  
Current Multiplier  
S
®
C
NRTL US  
C
US  
FEATURES  
DESCRIPTION  
•
The V I Chip™ current multiplier is a high efficiency (>91%)  
Sine Amplitude Converter™ (SAC™) operating from  
• 48 Vdc to 2 Vdc 40 A current multiplier  
- Operating from standard 48 V or 24 V PRM™regulators  
a 26 to 55 Vdc primary bus to deliver an isolated output.  
The Sine Amplitude Converter offers a low AC impedance  
beyond the bandwidth of most downstream regulators, which  
means that capacitance normally at the load can be located  
at the input to the Sine Amplitude Converter. Since the K factor  
of the VTM48EH020T040A00 is 1/24, that capacitance value  
can be reduced by a factor of 576, resulting in savings of board  
area, materials and total system cost.  
• High efficiency (>91%) reduces system power  
consumption  
• High density (267 A/in3)  
•
• “Half Chip” V I Chip package enables surface mount,  
low impedance interconnect to system board  
• Contains built-in protection features against:  
- Overvoltage  
•
The VTM48EH020T040A00 is provided in a V I Chip package  
compatible with standard pick-and-place and surface mount  
- Overcurrent  
- Short Circuit  
•
assembly processes. The co-molded V I Chip package provides  
enhanced thermal management due to large thermal interface  
area and superior thermal conductivity. With high conversion  
efficiency the VTM48EH020T040A00 increases overall system  
efficiency and lowers operating costs compared to conventional  
approaches.  
- Overtemperature  
- Reverse Inrush  
• Provides enable / disable control, internal temperature  
monitoring, current monitoring  
The VTM48EH020T040A00 enables the utilization of Factorized  
Power ArchitectureTM providing efficiency and size benefits by  
lowering conversion and distribution losses and promoting high  
density point of load conversion.  
• ZVS / ZCS resonant Sine Amplitude Converter topology  
• Less than 50ºC temperature rise at full load  
in typical applications  
TYPICAL APPLICATIONS  
• High End Computing Systems  
• Automated Test Equipment  
• High Density Power Supplies  
• Communications Systems  
• 0  
(NOM)  
VIN = 26 to 55 V  
OUT = 1.1 to 2.3 V  
IOUT = 40 A  
K= 1/24  
(NO LOAD)  
V
PART NUMBERING  
PART NUMBER  
PRODUCT GRADE  
T = -40° to 125°C  
M = -55° to 125°C  
VTM48EH020 x 040A00  
For Storage and Operating Temperatures see Section 6.0 General Characteristics  
Regulator  
Current Multiplier  
VC  
IM  
PC  
VC  
PR  
SG  
OS  
CD  
TM  
PC  
TM  
IL  
L
O
A
D
VTM™  
PRM™  
(See Application Note AN:024)  
+Out  
+Out  
+In  
+In  
VIN  
-Out  
-Out  
-In  
-In  
Factorized Power Architecture™  
Rev. 2.0  
5/2011  
V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200  
Page 1 of 16  
vicorpower.com  
VTM48EH020 x 040A00  
1.0 ABSOLUTE MAXIMUM VOLTAGE RATINGS  
The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent  
damage to the device.  
MIN  
+ IN to - IN . . . . . . . . . . . . . . . . . . . . . . . -1.0  
PC to - IN . . . . . . . . . . . . . . . . . . . . . . . . -0.3  
TM to -IN . . . . . . . . . . . . . . . . . . . . . . . . -0.3  
VC to - IN . . . . . . . . . . . . . . . . . . . . . . . . -0.3  
MAX  
60  
UNIT  
VDC  
VDC  
VDC  
VDC  
MIN  
MAX  
3.15  
2250  
60  
UNIT  
VDC  
VDC  
VDC  
VDC  
IM to - IN.................................................  
+ IN / - IN to + OUT / - OUT (hipot)........  
+ IN / - IN to + OUT / - OUT (working)...  
0
20  
7
20  
+ OUT to - OUT....................................... -1.0  
4
2.0 ELECTRICAL CHARACTERISTICS  
Specifications apply over all line and load conditions unless otherwise noted; Boldface specifications apply over the temperature  
range of -40°C < TJ < 125°C (T-Grade); All other specifications are at TJ = 25ºC unless otherwise noted.  
ATTRIBUTE  
Input Voltage Range  
SYMBOL  
CONDITIONS / NOTES  
No external VC applied  
MIN  
TYP  
MAX  
UNIT  
26  
0
55  
55  
1
VIN  
VDC  
V/µs  
V
VC applied  
VIN Slew Rate  
dVIN /dt  
VIN_UV  
Module latched shutdown,  
No external VC applied, IOUT = 40A  
VIN = 45 V  
VIN = 26 V to 55 V  
VIN = 45 V, TC = 25ºC  
VIN UV Turn Off  
13.3  
26.0  
1.4  
3.9  
4.8  
3.0  
3.7  
No Load power dissipation  
Inrush current peak  
PNL  
W
A
2.4  
2.5  
VIN = 26 V to 55 V, TC = 25ºC  
VC enable, VIN = 45 V COUT = 1500 µF,  
RLOAD = 47 mΩ  
IINRP  
10  
DC input current  
Transfer ratio  
Output voltage  
IIN_DC  
K
VOUT  
1.8  
A
V/V  
V
K = VOUT/VIN, IOUT = 0 A  
VOUT = VIN • K - IOUT • ROUT, Section 11  
1/24  
Output current (average)  
Output current (peak)  
Output power (average)  
IOUT_AVG  
IOUT_PK  
POUT_AVG  
40  
60  
88.5  
A
A
W
TPEAK < 10 ms, IOUT_AVG ≤ 40 A  
IOUT_AVG ≤ 40 A  
VIN = 45 V, IOUT = 40 A  
VIN = 26 V to 55 V, IOUT = 40 A  
VIN = 45 V, IOUT = 20 A  
88.5  
83.0  
88.0  
88.0  
90.2  
Efficiency (ambient)  
Efficiency (hot)  
ηAMB  
%
%
90.3  
89.6  
ηHOT  
η20%  
ROUT_COLD  
ROUT_AMB  
ROUT_HOT  
FSW  
VIN = 45 V, TC = 100°C, IOUT = 40 A  
Efficiency (over load range)  
Output resistance (cold)  
Output resistance (ambient)  
Output resistance (hot)  
Switching frequency  
8 A < IOUT < 40 A  
77.0  
1.6  
1.8  
2.6  
1.60  
3.20  
%
TC = -40°C, IOUT = 40 A  
TC = 25°C, IOUT = 40 A  
TC = 100°C, IOUT = 40 A  
2.1  
2.7  
3.2  
1.80  
3.60  
2.6  
3.4  
5.0  
1.90  
3.80  
mΩ  
mΩ  
mΩ  
MHz  
MHz  
Output ripple frequency  
FSW_RP  
COUT = 0 F, IOUT = 40 A, VIN = 45 V,  
20 MHz BW, Section 12  
Frequency up to 30 MHz,  
Simulated J-lead model  
VOUT = 2 V  
Output voltage ripple  
VOUT_PP  
165  
350  
mV  
Output inductance (parasitic)  
Output capacitance (internal)  
Output capacitance (external)  
LOUT_PAR  
COUT_INT  
COUT_EXT  
600  
120  
pH  
µF  
µF  
VTM Standalone Operation  
VIN pre-applied, VC enable  
1500  
PROTECTION  
OVLO  
Overvoltage lockout  
response time  
Output overcurrent trip  
Short circuit protection trip current  
Output overcurrent response  
time constant  
VIN_OVLO+  
TOVLO  
IOCP  
ISCP  
Module latched shutdown  
Effective internal RC filter  
55.5  
57.7  
2.4  
70  
59.8  
100  
V
µs  
44  
80  
A
A
TOCP  
Effective internal RC filter (Integrative).  
5.5  
ms  
From detection to cessation  
of switching (Instantaneous)  
Short circuit protection response time  
Thermal shutdown setpoint  
TSCP  
1
µs  
ºC  
TJ_OTP  
125  
130  
135  
Rev. 2.0  
5/2011  
Page 2 of 16  
V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200  
vicorpower.com  
VTM48EH020 x 040A00  
3.0 SIGNAL CHARACTERISTICS  
Specifications apply over all line and load conditions unless otherwise noted; Boldface specifications apply over the temperature  
range of -40°C < TJ < 125°C (T-Grade); All other specifications are at TJ = 25°C unless otherwise noted.  
VTM CONTROL : VC  
•
•
Used to wake up powertrain circuit.  
A minimum of 12 V must be applied indefinitely for VIN < 26 V  
to ensure normal operation.  
•
•
PRM™ module VC can be used as valid wake-up signal source.  
VC voltage may be continuously applied;  
there will be minimal VC current drawn when VIN > 26 V and VC < 13.  
Internal resistance used in adaptive loop compensation  
•
VC slew rate must be within range for a successful start.  
•
SIGNAL TYPE  
STATE  
ATTRIBUTE  
SYMBOL  
CONDITIONS / NOTES  
MIN TYP MAX UNIT  
Required for startup, and operation  
below 26 V. See Section 7.  
Low VC current draw for VIN >26 V  
VC = 13 V, VIN = 0 V  
External VC voltage  
VVC_EXT  
VVC_TH  
12  
16.5  
150  
V
V
VC current draw threshold  
13  
90  
6
Steady  
VC current draw  
IVC  
VC = 13 V, VIN > 26 V  
mA  
VC = 16.5 V, VIN > 26 V  
90  
VC internal resistor  
VC slew rate  
RVC-INT  
dVC/dt  
IINR_VC  
TON  
9.31  
kΩ  
0.25 V/µs  
Required for proper startup;  
0.02  
ANALOG  
INPUT  
Start Up  
VC inrush current  
VC output turn-on delay  
VC = 16.5 V, dVC/dt = 0.25 V/µs  
VIN pre-applied, PC floating, VC enable  
CPC = 0 µF, COUT = 1500 µF  
750  
500  
mA  
µs  
Transitional  
VC = 12 V to PC high, VIN = 0 V,  
dVC/dt = 0.25 V/µs  
VC to PC delay  
TVC_PC  
10  
25  
µs  
µF  
Internal VC capacitance  
CVC_INT  
VC = 0 V  
2.2  
PRIMARY CONTROL : PC  
•
•
•
The PC pin enables and disables the VTM™ module.  
•
Module will shutdown when pulled low with an impedance  
When held below 2 V, the VTM module will be disabled.  
PC pin outputs 5 V during normal operation. PC pin is equal to 2.5 V  
during fault mode given VIN > 26 V and VC > 12 V.  
After successful start-up and under no fault condition, PC can be used as  
a 5 V regulated voltage source with a 2 mA maximum current.  
less than 400 Ω.  
•
•
In an array of VTM modules, connect PC pin to synchronize startup.  
PC pin cannot sink current and will not disable other module  
during fault mode.  
SIGNAL TYPE  
STATE  
ATTRIBUTE  
PC voltage  
PC source current  
PC resistance (internal)  
PC source current  
PC capacitance (internal)  
PC resistance (external)  
PC voltage (enable)  
PC voltage (disable)  
PC pull down current  
PC disable time  
SYMBOL  
CONDITIONS / NOTES  
MIN TYP MAX UNIT  
VPC  
IPC_OP  
RPC_INT  
IPC_EN  
CPC_INT  
RPC_EXT  
VPC_EN  
VPC_DIS  
IPC_PD  
4.7  
5.0  
5.3  
2
400  
300  
50  
V
mA  
kΩ  
µA  
pF  
kΩ  
V
Steady  
ANALOG  
OUTPUT  
Internal pull down resistor  
50  
50  
150  
100  
Start Up  
Section 7  
60  
2
Enable  
Disable  
2.5  
3
2
V
DIGITAL  
INPUT / OUPUT  
5.1  
mA  
µs  
TPC_DIS_T  
TFR_PC  
4
Transitional  
PC fault response time  
From fault to PC = 2 V  
100  
µs  
TEMPERATURE MONITOR : TM  
•
•
The TM pin monitors the internal temperature of the VTM controller IC  
within an accuracy of 5°C.  
Can be used as a "Power Good" flag to verify that the VTM is operating.  
•
The TM pin has a room temperature setpoint of 3 V (@27°C)  
and approximate gain of 10 mV/°C.  
SIGNAL TYPE  
STATE  
ATTRIBUTE  
TM voltage  
SYMBOL  
CONDITIONS / NOTES  
MIN TYP MAX UNIT  
VTM_AMB TJ controller = 27°C  
2.95 3.00 3.05  
V
TM source current  
TM gain  
ITM  
ATM  
100  
µA  
mV/°C  
ANALOG  
OUTPUT  
Steady  
10  
CTM = 0 F, VIN = 45 V,  
IOUT = 40 A  
TM voltage ripple  
VTM_PP  
120  
200  
mV  
Disable  
TM voltage  
VTM_DIS  
0
40  
V
kΩ  
pF  
µs  
TM resistance (internal)  
TM capacitance (external)  
TM fault response time  
RTM_INT  
CTM_EXT  
TFR_TM  
Internal pull down resistor  
From fault to TM = 1.5 V  
25  
50  
50  
DIGITAL OUTPUT  
(FAULT FLAG)  
Transitional  
10  
Rev. 2.0  
5/2011  
V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200  
Page 3 of 16  
vicorpower.com  
VTM48EH020 x 040A00  
3.0 SIGNAL CHARACTERISTICS (CONT.)  
Specifications apply over all line and load conditions unless otherwise noted; Boldface specifications apply over the temperature  
range of -40°C < TJ < 125°C (T-Grade); All other specifications are at TJ = 25°C unless otherwise noted.  
CURRENT MONITOR : IM  
•
The nominal IM pin voltage varies between 0.3 V and 1.64 V  
representing the output current within 25% under all operating line  
temperature conditions between 50% and 100%.  
•
The IM pin provides a DC analog voltage proportional to  
the output current of the VTM™ module.  
SIGNAL TYPE  
STATE  
ATTRIBUTE  
SYMBOL  
CONDITIONS / NOTES  
TC = 25ºC, VIN = 45 V, IOUT = 0 A  
MIN TYP MAX UNIT  
IM voltage (no load)  
IM voltage (50%)  
IM voltage (full load)  
IM gain  
VIM_NL  
0.15  
0.3  
0.82  
1.64  
41  
0.45  
V
V
V
mV/A  
MΩ  
VIM_50% TC = 25ºC, VIN = 45 V, IOUT = 20 A  
VIM_FL  
AIM  
ANALOG  
OUTPUT  
Steady  
TC = 25ºC, VIN = 45 V, IOUT = 40 A  
TC = 25ºC, VIN = 45 V, IOUT > 20 A  
IM resistance (external)  
RIM_EXT  
2.5  
4.0 TIMING DIAGRAM  
6
7
IOUT  
ISSP  
IOCP  
8
d
1
2
3
4
5
VC  
b
VVC-EXT  
a
VOVLO  
VIN  
NL  
≥ 26 V  
c
e
f
VOUT  
TM  
VTM-AMB  
PC  
g
5 V  
3 V  
a: VC slew rate (dVC/dt)  
b: Minimum VC pulse rate  
c: TOVLO  
1. Initiated VC pulse  
2. Controller start  
3. VIN ramp up  
Notes:  
– Timing and voltage is not to scale  
– Error pulse width is load dependent  
d: TOCP  
4. VIN = VOVLO  
5. VIN ramp down no VC pulse  
e: Output turn on delay (TON  
)
f: PC disable time (TPC_DIS_T  
)
6. Overcurrent  
g: VC to PC delay (TVC_PC  
)
7. Start up on short circuit  
8. PC driven low  
Rev. 2.0  
5/2011  
V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200  
Page 4 of 16  
vicorpower.com  
VTM48EH020 x 040A00  
5.0 APPLICATION CHARACTERISTICS  
The following values, typical of an application environment, are collected at TC = 25ºC unless otherwise noted. See associated figures  
for general trend data.  
ATTRIBUTE  
SYMBOL  
CONDITIONS / NOTES  
TYP  
UNIT  
No load power dissipation  
Efficiency (ambient)  
Efficiency (hot)  
Output resistance (ambient)  
Output resistance (hot)  
Output resistance (cold)  
PNL  
ηAMB  
VIN = 45 V  
VIN = 45 V, IOUT = 40 A  
2.6  
90.3  
89.8  
2.7  
3.1  
2.2  
W
%
%
ηHOT  
VIN = 45 V, IOUT = 40 A, TC = 100ºC  
VIN = 45 V, IOUT = 40 A  
VIN = 45 V, IOUT = 40 A, TC = 100ºC  
VIN = 45 V, IOUT = 40 A, TC = -40ºC  
COUT = 0 F, IOUT = 40 A, VIN = 45 V,  
20 MHz BW, Section 12  
IOUT_STEP = 0 A TO 40A, VIN = 45 V,  
ISLEW > 10 A/us  
IOUT_STEP = 40 A to 0 A, VIN = 45 V  
ISLEW > 10 A/us  
ROUT_AMB  
ROUT_HOT  
ROUT_COLD  
mΩ  
mΩ  
mΩ  
mV  
mV  
mV  
Output voltage ripple  
VOUT Transient (positive)  
VOUT Transient (negative)  
VOUT_PP  
193  
20  
VOUT_TRAN+  
VOUT_TRAN-  
20  
No Load Power Dissipation vs. Line  
Full Load Efficiency vs. Case Temperature  
5
4.5  
4
92  
90  
88  
86  
84  
82  
3.5  
3
2.5  
2
1.5  
1
26  
29  
32  
36  
Input Voltage (V)  
-40°C 25°C  
39  
42  
45  
49  
52  
55  
-40  
-20  
:
0
20  
40  
60  
80  
100  
Case Temperature (°C)  
26 V  
V
IN  
45 V  
55 V  
TCASE  
:
100°C  
Figure 1 — No load power dissipation vs. VIN  
Figure 2 — Full load efficiency vs. temperature  
Efficiency & Power Dissipation -40°C Case  
Efficiency & Power Dissipation 25°C Case  
92  
88  
84  
80  
76  
72  
68  
64  
60  
56  
18  
92  
88  
84  
80  
76  
72  
68  
64  
60  
56  
18  
16  
14  
12  
10  
8
16  
14  
12  
10  
8
η
η
PD  
PD  
6
6
4
4
2
2
0
0
0
4
8
12  
16  
20  
24  
28  
32  
36  
40  
0
4
8
12  
16  
Output Current (A)  
45 V 55 V 26 V  
20  
24  
28  
32  
36  
40  
Load Current (A)  
26 V  
45 V  
55 V  
VIN:  
26 V  
45 V  
55 V  
26 V  
45 V  
55 V  
VIN:  
Figure 3 — Efficiency and power dissipation at –40°C  
Figure 4 — Efficiency and power dissipation at 25°C  
Rev. 2.0  
5/2011  
V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200  
Page 5 of 16  
vicorpower.com  
VTM48EH020 x 040A00  
ROUT vs. Case Temperature at VIN = 45 V  
Efficiency & Power Dissipation 100°C Case  
92  
18  
16  
14  
12  
10  
8
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
88  
84  
80  
76  
72  
68  
64  
60  
56  
η
PD  
6
4
2
0
0
4
8
12  
16  
20  
24  
28  
32  
36  
40  
-40  
-20  
0
20  
Case Temperature (°C)  
IOUT  
40  
60  
80  
100  
Output Current (A)  
26 V  
45 V  
55 V  
26 V  
45 V  
55 V  
VIN:  
:
4 A  
40 A  
Figure 5 — Efficiency and power dissipation at 100°C  
Figure 6 — ROUT vs. temperature  
Ripple vs. Load  
IM Voltage vs. Load at VIN = 45 V  
200  
2.00  
1.75  
1.50  
1.25  
1.00  
0.75  
0.50  
0.25  
0
175  
150  
125  
100  
75  
50  
0
4
8
12  
16  
20  
24  
28  
32  
36  
40  
0
4
8
12  
16  
20  
24  
28  
32  
36  
40  
Load Current (A)  
Load Current (A)  
TCASE  
:
-40ºC  
25ºC  
100ºC  
Vpk-pk (mV)  
Figure 7 — VRIPPLE vs. IOUT ; No external COUT.  
Board mounted module, scope setting : 20 MHz analog BW  
Figure 8 — IM voltage vs. load  
IM Voltage vs. TCASE & Line  
IM Voltage vs. Load 25°C Case  
2.0  
1.9  
1.8  
1.7  
1.6  
1.5  
1.4  
1.3  
2.00  
1.75  
1.50  
1.25  
1.00  
0.75  
0.50  
0.25  
0
0
4
8
12  
Load Current (A)  
26 V 45 V  
16  
20  
24  
28  
32  
36  
40  
-40  
-20  
0
20  
40  
60  
80  
100  
TCASE (°C)  
V
IN  
:
55 V  
VIN  
26 V  
45 V  
55 V  
Figure 9 — IM voltage vs. load  
Figure 10 — Full load IM voltage vs. TCASE  
Rev. 2.0  
5/2011  
V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200  
Page 6 of 16  
vicorpower.com  
VTM48EH020 x 040A00  
Safe Operating Area  
80  
70  
60  
50  
40  
30  
20  
10  
0
10 ms Max  
Continuous  
0
0.25 0.5 0.75  
1
1.25 1.5 1.75  
2
2.25 2.5  
Output Voltage (V)  
Figure 12 — Full load ripple, 100 µF CIN; No external COUT.  
Board mounted module, scope setting : 20 MHz analog BW  
Figure 11 — Safe operating area  
Figure 13 — Start up from application of V ; VC pre-applied  
Figure 14 — Start up from application of VC; VIN pre-applied  
IN  
COUT = 0 µF  
COUT = 0 µF  
Figure 15 — 0 A– 40 A transient response:  
Figure 16 — 40 A – 0 A transient response:  
CIN = 100 µF, no external COUT  
CIN = 100 µF, no external COUT  
Rev. 2.0  
5/2011  
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6.0 GENERAL CHARACTERISTICS  
Specifications apply over all line and load conditions unless otherwise noted; Boldface specifications apply over the temperature  
range of -40ºC < TJ < 125ºC (T-Grade); All Other specifications are at TJ = 25°C unless otherwise noted.  
ATTRIBUTE  
MECHANICAL  
SYMBOL  
CONDITIONS / NOTES  
MIN  
TYP  
MAX  
UNIT  
Length  
Width  
Height  
Volume  
Weight  
L
W
H
Vol  
W
21.7 / [0.85]  
16.4 / [0.64]  
6.48 / [0.255]  
22.0 / [0.87]  
16.5 / [0.65]  
6.73 / [0.265]  
2.44 / [0.150]  
8.0 / 0.28  
22.3 / [0.88]  
16.6 / [0.66]  
6.98 / [0.275] mm/[in]  
mm/[in]  
mm/[in]  
No heat sink  
cm3/[in3]  
g/[oz]  
2.03  
0.15  
Nickel  
Palladium  
Gold  
0.51  
0.02  
0.003  
Lead finish  
µm  
0.051  
THERMAL  
VTM48EH020T040A00 (T-Grade)  
VTM48EH020M040A00 (M-Grade)  
-40  
-55  
125  
125  
°C  
°C  
Ws/°C  
Operating temperature  
Thermal capacity  
TJ  
5
ASSEMBLY  
Peak compressive force  
applied to case (Z-axis)  
Supported by J-lead only  
2.5  
3
lbs  
VTM48EH020T040A00 (T-Grade)  
VTM48EH020M040A00 (M-Grade)  
Human Body Model,  
-40  
-65  
125  
125  
°C  
°C  
Storage temperature  
TST  
ESDHBM  
ESDMM  
1500  
400  
"JEDEC JESD 22-A114C.01"  
ESD withstand  
VDC  
Machine Model,  
"JEDEC JESD 22-A115-A"  
SOLDERING  
MSL 5  
MSL 6, TOB = 4hrs  
225  
245  
150  
3
°C  
°C  
s
°C/s  
°C/s  
Peak temperature during reflow  
Peak time above 183°C  
Peak heating rate during reflow  
Peak cooling rate post reflow  
1.5  
1.5  
6
SAFETY  
Working voltage (IN – OUT)  
Isolation voltage (hipot)  
Isolation capacitance  
Isolation resistance  
VIN_OUT  
VHIPOT  
CIN_OUT  
RIN_OUT  
60  
VDC  
VDC  
pF  
2250  
1350  
10  
Unpowered Unit  
1750  
4.5  
2150  
MΩ  
MHrs  
MIL HDBK 217, 25ºC,  
Ground Benign  
cTUVus  
MTBF  
cURus  
CE Mark  
Agency approvals/standards  
RoHS 6 of 6  
Rev. 2.0  
5/2011  
Page 8 of 16  
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7.0 USING THE CONTROL SIGNALS VC, PC, TM, IM  
Current Monitor (IM) pin provides a voltage proportional to  
the output current of the VTM module. The nominal voltage  
will vary between 0.3 V and 1.64 V over the output current  
range of the VTM module (See Figures 8–10). The accuracy of  
the IM pin will be within 25% under all line and temperature  
conditions between 50% and 100% load.  
The VTM Control (VC) pin is an input pin which powers the  
internal VCC circuitry when within the specified voltage range  
of 12 V to 16.5 V. This voltage is required in order for the  
VTM™ current multiplier to start, and must be applied as long  
as the input is below 26 V. In order to ensure a proper start,  
the slew rate of the applied voltage must be within the  
specified range.  
8.0 STARTUP BEHAVIOR  
Some additional notes on the using the VC pin:  
Depending on the sequencing of the VC with respect to the  
input voltage, the behavior during startup will vary as follows:  
• In most applications, the VTM module will be powered by  
an upstream PRM™ regulator which provides a 10 ms VC  
pulse during startup. In these applications the VC pins of the  
PRM and VTM modules should be tied together.  
• Normal Operation (VC applied prior to VIN): In this case the  
controller is active prior to ramping the input. When the  
input voltage is applied, the VTM module output voltage will  
track the input (See Figure 13). The inrush current is  
determined by the input voltage rate of rise and output  
capacitance. If the VC voltage is removed prior to the input  
reaching 26 V, the module may shut down.  
• The VC voltage can be applied indefinitely allowing for  
continuous operation down to 0 VIN.  
• The fault response of the VTM module is latching. A positive  
edge on VC is required in order to restart the unit. If VC is  
continuously applied the PC pin may be toggled to restart  
the module.  
• Stand Alone Operation (VC applied after VIN): In this case the  
module output will begin to rise upon the application of  
the VC voltage (See Figure 14). The Adaptive Soft Start  
circuit (See Section 10) may vary the ouput rate of rise in  
order to limit the inrush current to it’s maximum level. When  
starting into high capacitance, or a short, the output current  
will be limited for a maximum of 900 µsec. After this period,  
the adaptive soft start circuit will time out and the VTM  
module may shut down. No restart will be attempted until  
VC is re-applied, or PC is toggled. The maximum output  
capacitance is limited to 1500 µF in this mode of operation  
to ensure a sucessful start.  
Primary Control (PC) pin can be used to accomplish the  
following functions:  
• Delayed start: Upon the application of VC, the PC pin will  
source a constant 100 µA current to the internal RC  
network. Adding an external capacitor will allow further  
delay in reaching the 2.5 V threshold for module start.  
• Auxiliary voltage source: Once enabled in regular  
operational conditions (no fault), each VTM module PC  
provides a regulated 5 V, 2 mA voltage source.  
• Output disable: PC pin can be actively pulled down in order  
to disable the module. Pull down impedance shall be lower  
than 400 Ω.  
9.0 THERMAL CONSIDERATIONS  
•
V I Chip™ products are multi-chip modules whose  
• Fault detection flag: The PC 5 V voltage source is internally  
turned off as soon as a fault is detected. It is important to  
notice that PC doesn’t have current sink capability. Therefore,  
in an array, PC line will not be capable of disabling  
neighboring modules if a fault is detected.  
temperature distribution varies greatly for each part number as  
well as with the input / output conditions, thermal  
management and environmental conditions. Maintaining the  
top of the VTM48EH020T040A00 case to less than 100ºC will  
•
keep all junctions within the V I Chip module below 125ºC for  
most applications.  
• Fault reset: PC may be toggled to restart the unit if VC  
is continuously applied.  
The percent of total heat dissipated through the top surface  
versus through the J-lead is entirely dependent on the  
particular mechanical and thermal environment. The heat  
dissipated through the top surface is typically 60%. The heat  
dissipated through the J-lead onto the PCB board surface is  
typically 40%. Use 100% top surface dissipation when  
designing for a conservative cooling solution.  
Temperature Monitor (TM) pin provides a voltage  
proportional to the absolute temperature of the converter  
control IC.  
It can be used to accomplish the following functions:  
• Monitor the control IC temperature: The temperature in  
Kelvin is equal to the voltage on the TM pin scaled  
by 100. (i.e. 3.0 V = 300 K = 27ºC). If a heat sink is applied,  
TM can be used to thermally protect the system.  
•
It is not recommended to use a V I Chip module for an  
extended period of time at full load without proper heat sinking.  
• Fault detection flag: The TM voltage source is internally  
turned off as soon as a fault is detected. For system  
monitoring purposes (microcontroller interface) faults are  
detected on falling edges of TM signal.  
Rev. 2.0  
5/2011  
Page 9 of 16  
V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200  
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10.0 VTM™ MODULE BLOCK DIAGRAM  
Rev. 2.0  
5/2011  
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11.0 SINE AMPLITUDE CONVERTER™ POINT OF LOAD CONVERSION  
The Sine Amplitude Converter™ (SAC™) uses a high frequency  
resonant tank to move energy from input to output. (The  
resonant tank is formed by Cr and leakage inductance Lr in the  
power transformer windings as shown in the VTM™ Module  
Block Diagram. See Section 10). The resonant LC tank,  
operated at high frequency, is amplitude modulated as  
function of input voltage and output current. A small amount  
of capacitance embedded in the input and output stages of  
the module is sufficient for full functionality and is key to  
achieving power density.  
The VTM48EH020T040A00 SAC can be simplified into the  
following model:  
76 pH  
IOUT  
LOUT = 600 pH  
ROUT  
L
= 3.7 nH  
IN  
2.7 mΩ  
+
+
RCOUT  
22 µΩ  
RCIN  
87 mΩ  
1/24 • VIN  
6.3mΩ  
V•I  
K
1/24 • IOUT  
+
–
C
IN  
900 nF  
C
120 µF  
+
–
OUT  
VOUT  
V
IQ  
IN  
0.053 A  
–
–
•
Figure 17 — V I Chip™ module AC model  
At no load:  
ROUT = 0 Ω and IQ = 0 A, Eq. (3) now becomes Eq. (1) and is  
essentially load independent. A resistor R is now placed in  
series with VIN as shown in Figure 18.  
•
VOUT = VIN  
K
(1)  
(2)  
K represents the “turns ratio” of the SAC.  
Rearranging Eq (1):  
R
SAC™  
VOUT  
+
–
VOUT  
K =  
K = 1/32  
VIN  
VIN  
In the presence of load, VOUT is represented by:  
Figure 18 — K = 1/32 Sine Amplitude Converter™ with series  
input resistor  
•
•
VOUT = VIN K – IOUT ROUT  
(3)  
(4)  
The relationship between VIN and VOUT becomes:  
and IOUT is represented by:  
IIN – IQ  
•
•
VOUT = (VIN – IIN R) K  
(5)  
(6)  
IOUT  
=
K
Substituting the simplified version of Eq. (4)  
(IQ is assumed = 0 A) into Eq. (5) yields:  
ROUT represents the impedance of the SAC, and is a function of  
the RDSON of the input and output MOSFETs and the winding  
resistance of the power transformer. IQ represents the  
2
quiescent current of the SAC control and gate drive circuitry.  
•
•
•
VOUT = VIN K – IOUT R K  
The use of DC voltage transformation provides additional  
interesting attributes. Assuming for the moment that  
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This is similar in form to Eq. (3), where ROUT is used to  
represent the characteristic impedance of the SAC™. However,  
in this case a real R on the input side of the SAC is effectively  
scaled by K2 with respect to the output.  
Low impedance is a key requirement for powering a high  
current, low voltage load efficiently. A switching regulation  
stage should have minimal impedance, while simultaneously  
providing appropriate filtering for any switched current. The  
use of a SAC between the regulation stage and the point of  
load provides a dual benefit, scaling down series impedance  
leading back to the source and scaling up shunt capacitance  
(or energy storage) as a function of its K factor squared.  
However, these benefits are not useful if the series impedance  
of the SAC is too high. The impedance of the SAC must be low  
well beyond the crossover frequency of the system.  
Assuming that R = 1 Ω, the effective R as seen from the secondary  
side is 0.98 mΩ, with K = 1/32 as shown in Figure 18.  
A similar exercise should be performed with the additon of a  
capacitor, or shunt impedance, at the input to the SAC. A  
switch in series with VIN is added to the circuit. This is depicted  
in Figure 19.  
A solution for keeping the impedance of the SAC low involves  
switching at a high frequency. This enables magnetic  
components to be small since magnetizing currents remain  
low. Small magnetics mean small path lengths for turns. Use of  
low loss core material at high frequencies reduces core losses  
as well.  
S
SAC™  
V
K = 1/32  
+
–
OUT  
C
VIN  
The two main terms of power loss in the VTM™ module are:  
- No load power dissipation (PNL): defined as the power  
used to power up the module with an enabled power  
train at no load.  
Figure 19 — Sine Amplitude Converter™ with input capacitor  
- Resistive loss (ROUT): refers to the power loss across the  
VTM current multiplier modeled as pure resistive impedance.  
A change in VIN with the switch closed would result in a  
change in capacitor current according to the following  
equation:  
PDISSIPATED = PNL + PROUT  
Therefore,  
(10)  
dVIN  
(7)  
IC(t) = C  
dt  
POUT = PIN – PDISSIPATED = PIN – PNL – PROUT  
(11)  
Assume that with the capacitor charged to VIN, the switch is  
opened and the capacitor is discharged through the idealized  
SAC. In this case,  
The above relations can be combined to calculate the overall  
module efficiency:  
POUT  
PIN  
PIN – PNL – PROUT  
•
=
(12)  
IC= IOUT  
K
(8)  
η =  
PIN  
Substituting Eq. (1) and (8) into Eq. (7) reveals:  
2
•
•
VIN IIN – PNL – (IOUT  
VIN • IIN  
)
ROUT  
•
C
K2  
dVOUT  
dt  
=
(9)  
IOUT  
=
Writing the equation in terms of the output has yielded a K2  
scaling factor for C, this time in the denominator of the  
equation. For a K factor less than unity, this results in an  
effectively larger capacitance on the output when expressed in  
terms of the input. With a K=1/32 as shown in Figure 19,  
C=1 µF would effectively appear as C=1024 µF when viewed  
from the output.  
2
•
PNL + (IOUT  
)
ROUT  
= 1 –  
(
)
•
VIN IIN  
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12.0 INPUT AND OUTPUT FILTER DESIGN  
13.0 CAPACITIVE FILTERING CONSIDERATIONS  
FOR A SINE AMPLITUDE CONVERTER™  
A major advantage of a SAC™ system versus a conventional  
PWM converter is that the former does not require large  
functional filters. The resonant LC tank, operated at extreme  
high frequency, is amplitude modulated as a function of input  
voltage and output current and efficiently transfers charge  
through the isolation transformer. A small amount of  
capacitance embedded in the input and output stages of the  
module is sufficient for full functionality and is key to achieving  
high power density.  
It is important to consider the impact of adding input and  
output capacitance to a Sine Amplitude Converter on the  
system as a whole. Both the capacitance value, and the  
effective impedance of the capacitor must be considered.  
A Sine Amplitude Converter has a DC ROUT value which has  
already been discussed in section 11. The AC ROUT of the SAC  
contains several terms:  
• Resonant tank impedance  
This paradigm shift requires system design to carefully evaluate  
external filters in order to:  
• Input lead inductance and internal capacitance  
• Output lead inductance and internal capacitance  
1.Guarantee low source impedance.  
To take full advantage of the VTM™ module dynamic  
response, the impedance presented to its input terminals  
must be low from DC to approximately 5 MHz. Input  
capacitance may be added to improve transient  
The values of these terms are shown in the behavioral model in  
section 11. It is important to note on which side of the  
transformer these impedances appear and how they reflect  
across the transformer given the K factor.  
performance or compensate for high source impedance.  
The overall AC impedance varies from model to model but for  
most models it is dominated by DC ROUT value from DC to  
beyond 500 KHz. The behavioral model in section 11 should be  
used to approximate the AC impedance of the specific model.  
2.Further reduce input and/or output voltage ripple without  
sacrificing dynamic response.  
Given the wide bandwidth of the VTM module, the source  
response is generally the limiting factor in the overall  
system response. Anomalies in the response of the source  
will appear at the output of the VTM module multiplied by  
its K factor.  
Any capacitors placed at the output of the VTM module reflect  
back to the input of the module by the square of the K factor  
(Eq. 9) with the impedance of the module appearing in series.  
It is very important to keep this in mind when using a PRM™  
regulator to power the VTM™ current multiplier. Most PRM  
regulators have a limit on the maximum amount of  
capacitance that can be applied to the output. This capacitance  
includes both the PRM output capacitance and the VTM  
output capacitance reflected back to the input. In PRM remote  
sense applications, it is important to consider the reflected  
value of VTM module output capacitance when designing and  
compensating the PRM module control loop.  
3.Protect the module from overvoltage transients imposed  
by the system that would exceed maximum ratings and  
cause failures.  
•
The V I Chip™ module input/output voltage ranges must  
not be exceeded. An internal overvoltage lockout function  
prevents operation outside of the normal operating input  
range. Even during this condition, the powertrain is  
exposed to the applied voltage and power MOSFETs must  
withstand it.  
Capacitance placed at the input of the VTM module appear to  
the load reflected by the K factor, with the impedance of the  
module in series. In step-down VTM module ratios, the  
effective capacitance is increased by the K factor. The effective  
ESR of the capacitor is decreased by the square of the K factor,  
but the impedance of the module appears in series. Still, in  
most step-down VTM modules an electrolytic capacitor placed  
at the input of the module will have a lower effective  
impedance compared to an electrolytic capacitor placed at the  
output. This is important to consider when placing capacitors  
at the output of the module. Even though the capacitor may  
be placed at the output, the majority of the AC current will be  
sourced from the lower impedance, which in most cases will be  
the VTM module. This should be studied carefully in any  
system design using a VTM module. In most cases, it should be  
clear that electrolytic output capacitors are not necessary to  
design a stable, well-bypassed system.  
Rev. 2.0  
5/2011  
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14.0 CURRENT SHARING  
16.0 REVERSE INRUSH CURRENT PROTECTION  
The SAC™ topology bases its performance on efficient transfer  
of energy through a transformer without the need of closed  
loop control. For this reason, the transfer characteristic can be  
approximated by an ideal transformer with some resistive drop  
and positive temperature coefficient.  
The VTM48EH020T040A00 provides reverse inrush protection  
which prevents reverse current flow until the input voltage is  
high enough to first establish current flow in the forward  
direction. In the event that there is a DC voltage present on the  
output before the VTM module is powered up, this feature  
protects sensitive loads from excessive dV/dT during power up  
as shown in Figure 21.  
This type of characteristic is close to the impedance  
characteristic of a DC power distribution system, both in  
behavior (AC dynamic) and absolute value (DC dynamic).  
If a voltage is present at the output of the module which  
satisfies the condition VOUT > VIN • K after a successful power  
up the energy will be transferred from secondary to primary.  
The input to output ratio of the module will be maintained.  
The module will continue to operate in reverse as long as the  
input and output voltages are within the specified range.  
The VTM48EH020T040A00 has not been qualified for  
continuous reverse operation.  
When connected in an array with the same K factor, the  
VTM™ module will inherently share the load current with  
parallel units, according to the equivalent impedance divider  
that the system implements from the power source to the  
point of load.  
Some general recommendations to achieve matched array  
impedances:  
• Dedicate common copper planes within the PCB  
to deliver and return the current to the modules.  
Current Multiplier  
PC  
VC  
IM  
TM  
• Provide the PCB layout as symmetric as possible.  
R
R
• Apply same input / output filters (if present) to each unit.  
VTM™  
VIN  
+Out  
+In  
+
Supply  
_
For further details see AN:016 Using BCM™ Bus Converters  
in High Power Arrays.  
-Out  
-In  
A
B
C D  
E
F
G
H
ZIN_EQ1  
ZOUT_EQ1  
VIN  
VOUT  
VTM™1  
RO_1  
VC  
VIN  
ZIN_EQ2  
ZOUT_EQ2  
VTM™2  
RO_2  
Supply  
+
–
Load  
DC  
VIN  
VOUT  
ZIN_EQn  
ZOUT_EQn  
VTM™n  
RO_n  
VOUT  
Supply  
Figure 20 — VTM™ module array  
TM  
PC  
15.0 FUSE SELECTION  
In order to provide flexibility in configuring power systems  
V•I Chip™ products are not internally fused. Input line fusing  
of V•I Chip products is recommended at system level to  
provide thermal protection in case of catastrophic failure.  
A: VOUT supply > 0 V  
B: VC to -IN > 12 V controller wakes-up, PC & TM pulled  
high, reverse inrush protection blocks VOUT supplying VIN  
C: VIN supply ramps up  
The fuse shall be selected by closely matching system  
requirements with the following characteristics:  
D: VIN > VOUT/K, powertrain starts in normal mode  
E: VIN supply ramps down  
• Current rating  
(usually greater than maximum VTM module current)  
F: VIN > VOUT/K, powertrain transfers reverse energy  
G: VOUT ramps down, VIN follows  
• Maximum voltage rating (usually greater than the maximum  
possible input voltage)  
H: VC turns off  
• Ambient temperature  
• Nominal melting I2t  
Figure 21 — Reverse inrush protection  
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17.1 MECHANICAL DRAWING  
mm  
(inch)  
NOTES:  
mm  
2. DIMENSIONS ARE  
.
inch  
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:  
3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]  
4
. PRODUCT MARKING ON TOP SURFACE  
DXF and PDF files are available on vicorpower.com  
17.2 RECOMMENDED LAND PATTERN  
4
3
2
1
A
B
C
D
+In  
+Out  
-Out  
IM  
E
F
TM  
VC  
PC  
-In  
J
K
L
G
H
M
Bottom View  
Signal  
Name  
+In  
–In  
Designation  
A1-B1, A2-B2  
L1-M1, L2-M2  
E1  
IM  
TM  
F2  
NOTES:  
VC  
PC  
+Out  
–Out  
G1  
H2  
3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]  
4.  
PRODUCT MARKING ON TOP SURFACE  
mm  
A3-D3, A4-D4  
J3-M3, J4-M4  
2. DIMENSIONS ARE  
.
inch  
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:  
DXF and PDF files are available on vicorpower.com  
17.3 RECOMMENDED LAND PATTERN FOR PUSH PIN HEAT SINK  
Notes:  
1. Maintain 3.50 (0.138) Dia. keep-out zone  
free of copper, all PCB layers.  
2. (A) minimum recommended pitch is 24.00 (0.945)  
this provides 7.50 (0.295) component  
edge–to–edge spacing, and 0.50 (0.020)  
clearance between Vicor heat sinks.  
(B) Minimum recommended pitch is 25.50 (1.004).  
This provides 9.00 (0.354) component  
edge–to–edge spacing, and 2.00 (0.079)  
clearance between Vicor heat sinks.  
3. V•I Chip™ module land pattern shown  
for reference only, actual land pattern may differ.  
Dimensions from edges of land pattern  
to push–pin holes will be the same for  
all half size V•I Chip Products.  
4. RoHS compliant per CST–0001 latest revision.  
5. Unless otherwise specified:  
Dimensions are mm (inches)  
tolerances are:  
x.x (x.xx) = 0.13 (0.01)  
x.xx (x.xxx) = 0.13 (0.005)  
6. Plated through holes for grounding clips (33855)  
shown for reference. Heat sink orientation and  
device pitch will dictate final grounding solution.  
(NO GROUNDING CLIPS)  
(WITH GROUNDING CLIPS)  
Rev. 2.0  
5/2011  
V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200  
Page 15 of 16  
vicorpower.com  
VTM48EH020 x 040A00  
Warranty  
Vicor products are guaranteed for two years from date of shipment against defects in material or workmanship when in  
normal use and service. This warranty does not extend to products subjected to misuse, accident, or improper  
application or maintenance. Vicor shall not be liable for collateral or consequential damage. This warranty is extended to  
the original purchaser only.  
EXCEPT FOR THE FOREGOING EXPRESS WARRANTY, VICOR MAKES NO WARRANTY, EXPRESS OR IMPLIED, INCLUDING,  
BUT NOT LIMITED TO, THE WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.  
Vicor will repair or replace defective products in accordance with its own best judgement. For service under this  
warranty, the buyer must contact Vicor to obtain a Return Material Authorization (RMA) number and shipping  
instructions. Products returned without prior authorization will be returned to the buyer. The buyer will pay all charges  
incurred in returning the product to the factory. Vicor will pay all reshipment charges if the product was defective within  
the terms of this warranty.  
Information published by Vicor has been carefully checked and is believed to be accurate; however, no responsibility is  
assumed for inaccuracies. Vicor reserves the right to make changes to any products without further notice to improve  
reliability, function, or design. Vicor does not assume any liability arising out of the application or use of any product or  
circuit; neither does it convey any license under its patent rights nor the rights of others. Vicor general policy does not  
recommend the use of its components in life support applications wherein a failure or malfunction may directly threaten  
life or injury. Per Vicor Terms and Conditions of Sale, the user of Vicor components in life support applications assumes  
all risks of such use and indemnifies Vicor against all damages.  
Vicor’s comprehensive line of power solutions includes high density AC-DC  
and DC-DC modules and accessory components, fully configurable AC-DC  
and DC-DC power supplies, and complete custom power systems.  
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for  
its use. Vicor components are not designed to be used in applications, such as life support systems, wherein a failure or  
malfunction could result in injury or death. All sales are subject to Vicor’s Terms and Conditions of Sale, which are  
available upon request.  
Specifications are subject to change without notice.  
Intellectual Property Notice  
Vicor and its subsidiaries own Intellectual Property (including issued U.S. and Foreign Patents and pending patent  
applications) relating to the products described in this data sheet. Interested parties should contact Vicor's  
Intellectual Property Department.  
The products described on this data sheet are protected by the following U.S. Patents Numbers:  
5,945,130; 6,403,009; 6,710,257; 6,911,848; 6,930,893; 6,934,166; 6,940,013; 6,969,909; 7,038,917;  
7,145,186; 7,166,898; 7,187,263; 7,202,646; 7,361,844; D496,906; D505,114; D506,438; D509,472; and for  
use under 6,975,098 and 6,984,965.  
Vicor Corporation  
25 Frontage Road  
Andover, MA, USA 01810  
Tel: 800-735-6200  
Fax: 978-475-6715  
email  
Customer Service: custserv@vicorpower.com  
Technical Support: apps@vicorpower.com  
Rev. 2.0  
5/2011  
V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200  
Page 16 of 16  
vicorpower.com  
厂商 型号 描述 页数 下载

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