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TZA3030HL

型号：

TZA3030HL

描述：

SDH / SONET STM1 / OC3光接收机[ SDH/SONET STM1/OC3 optical receiver ]

品牌：

NXP[ NXP ]

页数：

20 页

PDF大小：

484 K

下载PDF手册
INTEGRATED CIRCUITS  
DATA SHEET  
TZA3030  
SDH/SONET STM1/OC3 optical  
receiver  
1998 Aug 24  
Objective specification  
File under Integrated Circuits, IC19  
Philips Semiconductors  
Objective specification  
SDH/SONET STM1/OC3 optical receiver  
TZA3030  
FEATURES  
APPLICATIONS  
• Low equivalent input noise, typically 1 pA/√Hz  
• Wide dynamic range, typically 0.5 µA to 2 mA  
• Digital fibre optic receiver in short, medium and long  
haul optical telecommunications transmission systems  
or in high speed data networks  
• On-chip low-pass filter. The bandwidth can be varied  
between 90 and 150 MHz using an external resistor.  
Default value is 120 MHz.  
• Wideband RF gain block.  
GENERAL DESCRIPTION  
• Differential transimpedance of 1.8 MΩ  
• On-chip Automatic Gain Control (AGC)  
The TZA3030 optical receiver is a low-noise  
transimpedance amplifier with AGC plus a limiting  
amplifier designed to be used in SDH/SONET fibre optic  
links. The TZA3030 amplifies the current generated by a  
photo detector (PIN diode or avalanche photodiode) and  
converts it to a differential output voltage.  
• Positive Emitter Coupled Logic (PECL) or  
Current-Mode Logic (CML) compatible data outputs  
• LOS (Loss Of Signal) detection  
• LOS threshold level can be adjusted using a single  
external resistor  
• On-chip DC offset compensation  
• Single supply voltage from 3.0 to 5.5 V  
• Bias voltage for PIN diode.  
ORDERING INFORMATION  
TYPE  
PACKAGE  
NUMBER  
NAME  
DESCRIPTION  
VERSION  
TZA3030HL  
TZA3030U  
LQFP32  
plastic low profile quad flat package; 32 leads; body 5 × 5 × 1.4 mm  
naked die in waffle pack carriers; die dimensions 1.58 × 1.58 mm  
SOT401-1  
−
−
1998 Aug 24  
2
Philips Semiconductors  
Objective specification  
SDH/SONET STM1/OC3 optical receiver  
TZA3030  
BLOCK DIAGRAM  
V
AGC  
V
CCA  
2
CCD  
2
2, 5  
31  
17, 20  
LOS DETECTION  
29  
28  
LOSTH  
TTL  
LOSTTL  
PECL  
26 LOS  
LOSQ  
27  
PEAK DETECTOR  
2
kΩ  
GAIN  
CONTROL  
DREF  
4
7
65 pF  
CML 18 OUTCML  
19 OUTQCML  
IPhoto  
1 nF  
A1  
A2  
15  
OUTSEL  
PECL  
22 OUTPECL  
PREAMPLIFIER  
LIMITING  
OUTQPECL  
23  
AMPLIFIER  
DC OFFSET  
COMPENSATION  
BIASING  
11  
TESTING  
14  
TZA3030  
1, 3, 6, 8  
9, 30, 32  
13, 16, 21  
24, 25  
12  
10  
MBK857  
7
5
V
BWC  
SUB AGND  
RFTEST  
DGND  
ref  
Fig.1 Block diagram.  
3
1998 Aug 24  
Philips Semiconductors  
Objective specification  
SDH/SONET STM1/OC3 optical receiver  
TZA3030  
PINNING  
SYMBOL  
PIN  
TYPE  
ground  
DESCRIPTION  
AGND  
VCCA  
1
2
3
4
5
6
7
analog ground  
supply  
ground  
analog supply voltage  
analog ground  
AGND  
DREF  
VCCA  
analog output bias voltage for PIN diode (VCCA); cathode should be connected to this pin  
supply  
ground  
analog supply voltage  
analog ground  
AGND  
IPhoto  
analog input current input; connect the anode of PIN diode to this pin; DC bias level is  
1048 mV  
AGND  
AGND  
BWC  
8
9
ground  
ground  
analog ground  
analog ground  
10  
analog input bandwidth control pin; default bandwidth is 120 MHz; a resistor should be  
connected between Vref (pin 11) and BWC (pin 10) to decrease bandwidth, or  
between BWC (pin 10) and AGND to increase bandwidth  
Vref  
11  
12  
13  
14  
15  
analog output band gap reference voltage; nominal value approximately 1.2 V  
SUB  
substrate  
ground  
substrate pin; to be connected to AGND  
digital ground  
DGND  
RFTEST  
OUTSEL  
analog input test pin; not connected; not used in application  
CMOS input output select pin; when OUTSEL is HIGH, CML data outputs are active and  
PECL data outputs are disabled; OUTSEL is pulled LOW if left unconnected,  
PECL data outputs will then be active and CML data outputs disabled  
DGND  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
ground  
digital ground  
VCCD  
supply  
digital supply voltage  
OUTCML  
OUTQCML  
VCCD  
CML output  
CML output  
supply  
CML data output; OUTCML goes HIGH when current flows into IPhoto (pin 7)  
CML compliment of OUTCML (pin 18)  
digital supply voltage  
DGND  
ground  
digital ground  
OUTPECL  
OUTQPECL  
DGND  
PECL output PECL data output; OUTPECL goes HIGH when current flows into IPhoto (pin 7)  
PECL output PECL compliment of OUTPECL (pin 22)  
ground  
ground  
digital ground  
digital ground  
DGND  
LOS  
PECL output PECL-compatible LOS detection pin; LOS output is HIGH when the input signal  
is below the user programmable threshold level  
LOSQ  
27  
28  
PECL output PECL compliment of LOS (pin 26)  
LOSTTL  
TTL output  
CMOS-compatible LOS detection pin; the LOSTTL output is HIGH when the  
input signal is below the user programmable threshold level  
LOSTH  
29  
analog I/O  
pin for setting input threshold level; nominal DC voltage is VCCA − 1.5 V;  
threshold level set by connecting an external resistor between LOSTH and  
VCCA or by forcing a current into LOSTH; default value for this resistor is 400 kΩ  
AGND  
AGC  
30  
31  
ground  
analog ground  
analog I/O  
AGC monitor voltage; the internal AGC circuit can be disabled by applying an  
external voltage to this pin  
AGND  
32  
ground  
analog ground  
1998 Aug 24  
4
Philips Semiconductors  
Objective specification  
SDH/SONET STM1/OC3 optical receiver  
TZA3030  
DGND  
24  
AGND  
1
2
3
4
5
6
7
8
V
23 OUTQPECL  
22 OUTPECL  
21 DGND  
CCA  
AGND  
DREF  
TZA3030HL  
V
V
CCD  
20  
19  
18  
17  
CCA  
AGND  
IPhoto  
AGND  
OUTQCML  
OUTCML  
V
CCD  
MBK856  
Fig.2 Pin configuration.  
1998 Aug 24  
5
Philips Semiconductors  
Objective specification  
SDH/SONET STM1/OC3 optical receiver  
TZA3030  
CHIP DIMENSIONS AND BONDING PAD LOCATIONS  
COORDINATES(1)  
COORDINATES(1)  
SYMBOL  
PAD  
SYMBOL  
PAD  
x
y
x
y
OUTQCML  
VCCD  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
1398  
1398  
1398  
1398  
1398  
1398  
1283  
1143  
986  
543  
683  
AGND  
1
2
102  
102  
102  
102  
102  
102  
102  
102  
243  
383  
523  
663  
803  
943  
1100  
1257  
1398  
1398  
1251  
1111  
971  
814  
674  
534  
395  
254  
105  
105  
105  
105  
105  
105  
105  
105  
263  
403  
VCCA  
DGND  
823  
AGND  
DREF  
VCCA  
3
OUTPECL  
OUTQPECL  
DGND  
963  
4
1103  
1243  
1400  
1400  
1400  
1400  
1400  
1400  
1400  
1400  
5
AGND  
IPhoto  
AGND  
AGND  
BWC  
6
DGND  
7
LOS  
8
LOSQ  
9
LOSTTL  
LOSTH  
AGND  
829  
10  
11  
12  
13  
14  
15  
16  
17  
18  
671  
Vref  
514  
SUB  
AGC  
357  
DGND  
RFTEST  
OUTSEL  
DGND  
VCCD  
AGND  
217  
Note  
1. All coordinates (µm) are measured with respect to the  
bottom left-hand corner of the die.  
OUTCML  
32 31  
30  
29  
28  
27  
26 25  
AGND  
1
2
3
DGND  
24  
23  
V
OUTQPECL  
CCA  
AGND  
DREF  
22  
21  
20  
19  
18  
17  
OUTPECL  
DGND  
4
5
6
7
8
1.58  
mm  
TZA3030U  
V
V
CCD  
CCA  
OUTQCML  
OUTCML  
AGND  
IPhoto  
AGND  
V
CCD  
9
10 11 12 13 14  
15  
16  
0
x
0
y
MBK858  
1.58 mm  
Fig.3 Bonding pad locations of TZA3030U.  
6
1998 Aug 24  
Philips Semiconductors  
Objective specification  
SDH/SONET STM1/OC3 optical receiver  
TZA3030  
FUNCTIONAL DESCRIPTION  
Limiting amplifier  
The TZA3030 contains five functional blocks:  
• Preamplifier input stage  
A limiting amplifier boosts the signal up to PECL levels.  
The output can be either CML or PECL compatible,  
selected by means of pin OUTSEL. When OUTSEL is  
HIGH, the CML data outputs are active and the PECL data  
outputs are disabled. If OUTSEL is left unconnected, it is  
pulled LOW and the PECL data outputs are active while  
the CML data outputs are disabled.  
• Low-pass filter  
• Limiting amplifier stage  
• Offset compensation loop  
• Loss of signal detection unit.  
The logic level symbol definitions for CML and PECL are  
shown in Fig.4.  
Preamplifier  
The CML and PECL output circuits are given in Fig.5.  
The preamplifier provides low-noise amplification of the  
current generated by a photodiode connected to  
pin IPhoto.  
Offset compensation loop  
A differential amplifier converts the output of the  
preamplifier to a differential voltage. An AGC loop  
increases the dynamic range of the receiver by reducing  
the feedback resistance of the preamplifier. The AGC loop  
hold capacitor is integrated on-chip, so an external  
capacitor is not needed for AGC. The AGC voltage can be  
monitored at pin AGC. This pin can be left unconnected for  
normal operation. It can also be used to force an external  
AGC voltage. If pin AGC is connected to VCCA, the internal  
AGC loop is disabled and the receiver gain is at a  
maximum. In this case, the maximum input current is  
approximately 10 µA.  
A control loop connected between the limiting amplifier  
output and the differential amplifier input cancels the  
DC offset. The loop bandwidth is fixed internally at 30 kHz.  
Loss Of Signal (LOS) detection  
The LOS section detects an input signal level below a fixed  
threshold. The threshold is determined by the current  
through pin LOSTH. If this current is increased, the  
threshold level will rise. An external resistor connected  
between pin LOSTH and VCCA can be used, or a current  
can be forced into pin LOSTH. The default value for the  
external resistor is 400 kΩ. In this case, the current  
through pin LOSTH will be approximately 3.75 µA since  
the voltage at pin LOSTH is regulated at 1.5 V below the  
supply voltage. This threshold corresponds to an input  
current of 208 nA. The ratio of LOSTH current to input  
current is thus approximately 18 : 1. When the input signal  
level falls below this threshold, the LOS  
Low-pass filter  
A low-pass filter controls the bandwidth of the receiver,  
which can be varied between 90 and 150 MHz.  
The bandwidth is set to 120 MHz by default. It can be  
decreased by connecting a resistor between pin BWC and  
pin Vref or increased by connecting a resistor between  
pin BWC and AGND.  
(PECL compatible) and LOSTTL (TTL compatible)  
outputs go HIGH. The hysteresis is fixed internally at 3 dB.  
Response time is typically less than 20 µs.  
1998 Aug 24  
7
Philips Semiconductors  
Objective specification  
SDH/SONET STM1/OC3 optical receiver  
TZA3030  
V
V
CC  
V
O(max)  
V
OQH  
V
OH  
o(p-p)  
V
OQL  
V
OO  
V
OL  
V
O(min)  
MGR243  
Fig.4 Logic level symbol definitions for CML and PECL.  
V
V
CC  
CC  
105 Ω  
105 Ω  
100 Ω  
100 Ω  
OUTQCML  
OUTCML  
OUTPECL  
OUTQPECL  
0.5 mA  
9 mA  
0.5 mA  
6 mA  
MGK886  
a. CML.  
b. PECL.  
Fig.5 Output circuits.  
8
1998 Aug 24  
Philips Semiconductors  
Objective specification  
SDH/SONET STM1/OC3 optical receiver  
TZA3030  
LIMITING VALUES  
In accordance with the Absolute Maximum Rating System (IEC 134).  
SYMBOL  
VCC  
Vn  
PARAMETER  
MIN.  
−0.5  
MAX.  
+6  
UNIT  
supply voltage  
DC voltage  
V
pin 7: IPhoto  
pin 14: RFTEST  
−0.5  
−0.5  
+2  
V
V
V
V
V
V
V
V
V
V
V
VCC + 0.5  
pins 22, 23, 26 and 27: OUTPECL, OUTQPECL, LOS and LOSQ  
V
CC − 2  
CC − 2  
VCC + 0.5  
VCC + 0.5  
pins 18 and 19: OUTCML and OUTQCML  
pin 29: LOSTH  
pin 10: BWC  
V
−0.5  
−0.5  
−0.5  
−0.5  
−0.5  
−0.5  
−0.5  
VCC + 0.5  
+3.2  
pin 31: AGC  
VCC + 0.5  
pin 11: Vref  
+3.2  
pin 4: DREF  
V
V
V
CC + 0.5  
pin 15: OUTSEL  
pin 28: LOSTTL  
DC current  
CC + 0.5  
CC + 0.5  
In  
pin 7: IPhoto  
−2.5  
−2  
+2.5  
+2  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mW  
°C  
pin 14: RFTEST  
pins 22, 23, 26 and 27: OUTPECL, OUTQPECL, LOS and LOSQ −25  
+10  
+15  
+2  
pins 18 and 19: OUTCML and OUTQCML  
pin 29: LOSTH  
−15  
−2  
pin 10: BWC  
−1  
+1  
pin 31: AGC  
−0.2  
−2  
+0.2  
+2.5  
+2.5  
+0.5  
+16  
600  
+150  
150  
+85  
pin 11: Vref  
pin 4: DREF  
−2.5  
−0.5  
−16  
−
pin 15: OUTSEL  
pin 28: LOSTTL  
Ptot  
Tstg  
Tj  
total power dissipation  
storage temperature  
junction temperature  
operating ambient temperature  
−65  
−
°C  
Tamb  
−40  
°C  
THERMAL CHARACTERISTICS  
SYMBOL  
PARAMETER  
VALUE  
tbf  
UNIT  
K/W  
K/W  
Rth(j-s)  
Rth(j-a)  
thermal resistance from junction to solder point  
thermal resistance from junction to ambient  
tbf  
1998 Aug 24  
9
Philips Semiconductors  
Objective specification  
SDH/SONET STM1/OC3 optical receiver  
TZA3030  
CHARACTERISTICS  
For typical values Tamb = 25 °C and VCC = 5 V; minimum and maximum values are valid over the entire ambient  
temperature range and process spread.  
SYMBOL  
PARAMETER  
supply voltage  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
VCC  
ICCD  
3
5
5.5  
28  
−
V
digital supply current  
note 1  
13  
−
20  
47  
17  
36  
−
mA  
mA  
mA  
mA  
mW  
°C  
note 2  
note 3  
11  
24  
−
24  
51  
ICCA  
Ptot  
Tj  
analog supply current  
total power dissipation  
junction temperature  
525  
−40  
−40  
−
+110  
+85  
Tamb  
operating ambient  
temperature  
+25  
°C  
Rtr  
small-signal transresistance  
of the receiver  
measured differentially  
PECL outputs  
−
−
−
2000  
1000  
120  
−
−
−
kΩ  
CML outputs  
kΩ  
f−3dB(h)  
high frequency −3 dB point  
low frequency −3 dB point  
pin BWC left  
unconnected; note 4  
MHz  
f−3dB(l)  
In(tot)  
20  
30  
40  
kHz  
total integrated RMS noise  
current over bandwidth  
referenced to input;  
Ci = 1.2 pF; note 5  
∆f = 90 MHz  
∆f = 120 MHz  
∆f = 155 MHz  
−
−
−
16  
tbf  
tbf  
−
−
−
nA  
nA  
nA  
PSRR  
power supply rejection ratio  
AGC loop constant  
measured differentially;  
note 6  
f = 100 kHz to 10 MHz  
f = 10 MHz to 100 MHz  
−
−
−
0.5  
10  
1
µA/V  
µA/V  
dB/ms  
∆Rtr/∆t  
−
Input: IPhoto  
Vbias(IPhoto) input bias voltage  
tbf  
1048  
+1  
tbf  
mV  
µA  
µA  
Ii(IPhoto)(p-p) input current (peak-to-peak  
value)  
VCC = 5 V  
−2000  
−1000  
+2000  
+1000  
VCC = 3.3 V  
+1  
PECL outputs: OUTPECL and OUTQPECL  
VOH  
VOL  
VOO  
tr  
HIGH-level output voltage  
LOW-level output voltage  
output offset voltage  
rise time  
50 Ω to VCC − 2 V  
50 Ω to VCC − 2 V  
measured differentially  
20% to 80%  
V
CC − 1100  
CC − 1840  
−
V
V
CC − 900  
mV  
V
−
CC − 1620 mV  
−10  
−
−
+10  
tbf  
mV  
ps  
tbf  
tbf  
tf  
fall time  
80% to 20%  
−
tbf  
ps  
1998 Aug 24  
10  
Philips Semiconductors  
Objective specification  
SDH/SONET STM1/OC3 optical receiver  
TZA3030  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
PECL outputs: LOS and LOSQ  
VOH  
VOL  
VOO  
tr  
HIGH-level output voltage  
LOW-level output voltage  
output offset voltage  
rise time  
50 Ω to VCC − 2 V  
50 Ω to VCC − 2 V  
measured differentially  
20% to 80%  
V
CC − 1100  
CC − 1840  
−
−
−
−
−
V
V
CC − 900  
mV  
V
CC − 1620 mV  
−10  
−
+10  
600  
200  
mV  
ns  
tf  
fall time  
80% to 20%  
−
ns  
CML outputs: OUTCML and OUTQCML  
VO  
output voltage  
measured single-ended;  
50 Ω to VCC  
V
CC − 260  
−
VCC  
260  
+10  
mV  
mV  
mV  
Vo(se)(p-p)  
VOO  
output voltage single-ended  
(peak-to-peak value)  
50 Ω to VCC  
150  
−10  
200  
output offset voltage  
measured differentially;  
−
50 Ω to VCC  
Ro  
tr  
output resistance  
rise time  
measured single-ended  
80  
100  
tbf  
120  
Ω
20% to 80%;  
−
−
ps  
RL = 50 Ω; CL = 1 pF  
tf  
fall time  
80% to 20%;  
−
tbf  
−
ps  
RL = 50 Ω; CL = 1 pF  
CMOS input: OUTSEL  
VIL  
VIH  
LOW-level input voltage  
HIGH-level input voltage  
−
0.4  
0.8  
V
V
V
CC − 1  
VCC − 0.5  
−
CMOS output: LOSTTL  
VOL  
VOH  
LOW-level output voltage  
HIGH-level output voltage  
0
−
−
0.2  
V
V
V
CC − 0.2  
VCC  
Notes  
1. OUTPECL, OUTQPECL, OUTCML, OUTQCML, LOS and LOSQ outputs are left unconnected. OUTPECL and  
OUTQPECL outputs are active.  
2. OUTPECL and OUTQPECL outputs are terminated with 50 Ω to VT. VT is an external termination voltage for PECL  
outputs and is 2 V below the supply voltage. OUTCML, OUTQCML, LOS and LOSQ outputs are left unconnected.  
3. OUTCML and OUTQCML outputs are terminated with 50 Ω to VCCD; CML outputs are active. OUTPECL,  
OUTQPECL, LOS and LOSQ outputs are left unconnected.  
4. The bandwidth is set to 120 MHz by default. It can be varied between 90 and 150 MHz by adjusting the voltage at  
pin BWC.  
5. All In(tot) measurements were made with an input capacitance of Ci = 1.2 pF. This was comprised of 0.7 pF for the  
photodiode itself, with 0.3 pF allowed for the PCB layout and 0.2 pF intrinsic to the package.  
6. PSRR is defined as the ratio of the equivalent current change at the input (∆IIPhoto) to a change in supply voltage:  
∆IIPhoto  
PSRR =  
--------------------  
∆VCC  
For example, a 4 mV disturbance on VCCat 10 MHz will typically generate the equivalent of 2 nA extra photodiode  
current.  
1998 Aug 24  
11  
Philips Semiconductors  
Objective specification  
SDH/SONET STM1/OC3 optical receiver  
TZA3030  
APPLICATION INFORMATION  
V
CC  
680 nF  
10 µH  
10 µH  
22 nF  
22 nF  
400 kΩ  
2
2
V
V
LOSTH  
CCA  
CCD  
2, 5  
29  
17, 20  
LOSQ  
LOS  
27  
26  
28  
1 nF  
LOSTTL  
R1  
R1  
DREF  
Z
Z
= 50 Ω  
= 50 Ω  
o
o
4
7
OUTQPECL  
OUTPECL  
23  
22  
TZA3030  
IPhoto  
OUTQCML  
OUTCML  
19  
18  
R2  
R2  
1, 3, 6, 8  
13, 16, 21  
24, 25  
12 9, 30, 32  
31  
10  
14  
11  
15  
SUB  
AGND AGC BWC RFTEST  
7
V
OUTSEL DGND  
5
MBK859  
ref  
Fig.6 Application diagram: PECL data outputs active.  
V
CC  
680 nF  
10 µH  
10 µH  
22 nF  
22 nF  
400 kΩ  
2
2
V
V
LOSTH  
CCA  
CCD  
2, 5  
29  
17, 20  
LOSQ  
LOS  
27  
26  
28  
1 nF  
LOSTTL  
DREF  
4
7
OUTQPECL  
OUTPECL  
23  
22  
TZA3030  
R1  
R1  
IPhoto  
Z
Z
= 50 Ω  
o
OUTQCML  
OUTCML  
19  
18  
1, 3, 6, 8  
12 9, 30, 32  
13, 16, 21  
24, 25  
31  
10  
14  
11  
15  
= 50 Ω  
o
SUB  
AGND AGC BWC RFTEST  
7
V
OUTSEL DGND  
5
ref  
MBK860  
Fig.7 Application diagram: CML data outputs active.  
12  
1998 Aug 24  
Philips Semiconductors  
Objective specification  
SDH/SONET STM1/OC3 optical receiver  
TZA3030  
PECL outputs: OUTPECL, OUTQPECL, LOS and LOSQ  
PECL outputs can be terminated in different ways depending on the power supply voltage (see Fig.8).  
V
= 3.3 V  
CC  
R1 = 127 Ω  
R1 = 127 Ω  
V
OQ  
V
IQ  
V
I
V
O
R2 = 82.5 Ω  
R2 = 82.5 Ω  
GND  
V
= 5 V  
CC  
R1 = 83.3 Ω  
R1 = 83.3 Ω  
V
OQ  
V
IQ  
V
I
V
O
R2 = 125 Ω  
R2 = 125 Ω  
GND  
MGK887  
Fig.8 PECL termination schemes.  
13  
1998 Aug 24  
Philips Semiconductors  
Objective specification  
SDH/SONET STM1/OC3 optical receiver  
TZA3030  
If the output impedance was 50 Ω rather than 100 Ω,  
an 8 mA tail current would be needed to generate the  
same voltage swing. This would increase power  
dissipation by 33%.  
CML outputs: OUTCML and OUTQCML  
The output impedance of the CML output driver is 100 Ω  
(see Fig.9) which doesn’t match the characteristic  
impedance of the strip line. While this means that the  
reflections of some incident edges will arrive at the driver  
output on the PCB, this value was selected to reduce  
power dissipation inside the IC. The parallel combination  
of 100 Ω and 50 Ω (33 Ω) will generate a signal swing of  
200 mV (peak-to-peak value, single-sided) with a tail  
current of 6 mA.  
If necessary, the output impedance of the generator can  
be matched to the line impedance by connecting an  
external 100 Ω resistor in parallel with the output as shown  
in Fig.10. The magnitude of the output voltage swing will  
not change due to adaptive regulation. However, power  
dissipation will increase by 33%.  
generator  
inside TZA3030  
interconnect  
PCB  
receiver  
inside TZA3004  
V
CC  
V
CC  
100 100  
Z
Z
= 50 Ω  
o
o
Ω
Ω
50 Ω  
50 Ω  
V
V
I
O
= 50 Ω  
V
V
IQ  
OQ  
MBK861  
Fig.9 CML interface circuit without matched impedance; low power dissipation.  
generator  
inside TZA3030  
interconnect  
PCB  
receiver  
inside TZA3004  
V
CC  
V
CC  
100 100  
Ω
Ω
100 100  
Z
Z
= 50 Ω  
= 50 Ω  
o
o
Ω
Ω
50 Ω  
50 Ω  
V
V
I
O
V
V
IQ  
OQ  
MBK862  
Fig.10 CML interface circuit with matched impedance; high power dissipation.  
14  
1998 Aug 24  
Philips Semiconductors  
Objective specification  
SDH/SONET STM1/OC3 optical receiver  
TZA3030  
PACKAGE OUTLINE  
LQFP32: plastic low profile quad flat package; 32 leads; body 5 x 5 x 1.4 mm  
SOT401-1  
c
y
X
A
E
17  
24  
Z
16  
25  
E
e
A
H
2
E
A
(A )  
3
A
1
w M  
p
θ
pin 1 index  
b
L
p
32  
9
L
1
8
detail X  
Z
v M  
D
A
e
w M  
b
p
D
B
H
v
M
B
D
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(1)  
(1)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
D
H
L
L
v
w
y
Z
Z
E
θ
1
2
3
p
E
p
D
max.  
7o  
0o  
0.15 1.5  
0.05 1.3  
0.27 0.18 5.1  
0.17 0.12 4.9  
5.1  
4.9  
7.15 7.15  
6.85 6.85  
0.75  
0.45  
0.95 0.95  
0.55 0.55  
mm  
1.60  
0.25  
0.5  
1.0  
0.2 0.12 0.1  
Note  
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
EIAJ  
95-12-19  
97-08-04  
SOT401-1  
1998 Aug 24  
15  
Philips Semiconductors  
Objective specification  
SDH/SONET STM1/OC3 optical receiver  
TZA3030  
If wave soldering cannot be avoided, for LQFP  
packages with a pitch (e) larger than 0.5 mm, the  
following conditions must be observed:  
SOLDERING  
Introduction  
There is no soldering method that is ideal for all IC  
packages. Wave soldering is often preferred when  
through-hole and surface mounted components are mixed  
on one printed-circuit board. However, wave soldering is  
not always suitable for surface mounted ICs, or for  
printed-circuits with high population densities. In these  
situations reflow soldering is often used.  
• A double-wave (a turbulent wave with high upward  
pressure followed by a smooth laminar wave)  
soldering technique should be used.  
• The footprint must be at an angle of 45° to the board  
direction and must incorporate solder thieves  
downstream and at the side corners.  
During placement and before soldering, the package must  
be fixed with a droplet of adhesive. The adhesive can be  
applied by screen printing, pin transfer or syringe  
dispensing. The package can be soldered after the  
adhesive is cured.  
This text gives a very brief insight to a complex technology.  
A more in-depth account of soldering ICs can be found in  
our “Data Handbook IC26; Integrated Circuit Packages”  
(order code 9398 652 90011).  
Maximum permissible solder temperature is 260 °C, and  
maximum duration of package immersion in solder is  
10 seconds, if cooled to less than 150 °C within  
Reflow soldering  
Reflow soldering techniques are suitable for all LQFP  
packages.  
6 seconds. Typical dwell time is 4 seconds at 250 °C.  
Reflow soldering requires solder paste (a suspension of  
fine solder particles, flux and binding agent) to be applied  
to the printed-circuit board by screen printing, stencilling or  
pressure-syringe dispensing before package placement.  
A mildly-activated flux will eliminate the need for removal  
of corrosive residues in most applications.  
Repairing soldered joints  
Several methods exist for reflowing; for example,  
infrared/convection heating in a conveyor type oven.  
Throughput times (preheating, soldering and cooling) vary  
between 50 and 300 seconds depending on heating  
method. Typical reflow peak temperatures range from  
215 to 250 °C.  
Fix the component by first soldering two diagonally-  
opposite end leads. Use only a low voltage soldering iron  
(less than 24 V) applied to the flat part of the lead. Contact  
time must be limited to 10 seconds at up to 300 °C. When  
using a dedicated tool, all other leads can be soldered in  
one operation within 2 to 5 seconds between  
270 and 320 °C.  
Wave soldering  
Wave soldering is not recommended for LQFP packages.  
This is because of the likelihood of solder bridging due to  
closely-spaced leads and the possibility of incomplete  
solder penetration in multi-lead devices.  
CAUTION  
Wave soldering is NOT applicable for all LQFP  
packages with a pitch (e) equal or less than 0.5 mm.  
1998 Aug 24  
16  
Philips Semiconductors  
Objective specification  
SDH/SONET STM1/OC3 optical receiver  
TZA3030  
DEFINITIONS  
Data sheet status  
Objective specification  
Preliminary specification  
Product specification  
This data sheet contains target or goal specifications for product development.  
This data sheet contains preliminary data; supplementary data may be published later.  
This data sheet contains final product specifications.  
Limiting values  
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or  
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation  
of the device at these or at any other conditions above those given in the Characteristics sections of the specification  
is not implied. Exposure to limiting values for extended periods may affect device reliability.  
Application information  
Where application information is given, it is advisory and does not form part of the specification.  
LIFE SUPPORT APPLICATIONS  
These products are not designed for use in life support appliances, devices, or systems where malfunction of these  
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for  
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such  
improper use or sale.  
1998 Aug 24  
17  
Philips Semiconductors  
Objective specification  
SDH/SONET STM1/OC3 optical receiver  
TZA3030  
NOTES  
1998 Aug 24  
18  
Philips Semiconductors  
Objective specification  
SDH/SONET STM1/OC3 optical receiver  
TZA3030  
NOTES  
1998 Aug 24  
19  
Philips Semiconductors – a worldwide company  
Argentina: see South America  
Middle East: see Italy  
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,  
Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,  
Tel. +61 2 9805 4455, Fax. +61 2 9805 4466  
Tel. +31 40 27 82785, Fax. +31 40 27 88399  
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 160 1010,  
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,  
Fax. +43 160 101 1210  
Tel. +64 9 849 4160, Fax. +64 9 849 7811  
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,  
Norway: Box 1, Manglerud 0612, OSLO,  
220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773  
Tel. +47 22 74 8000, Fax. +47 22 74 8341  
Belgium: see The Netherlands  
Brazil: see South America  
Pakistan: see Singapore  
Philippines: Philips Semiconductors Philippines Inc.,  
106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,  
Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474  
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,  
51 James Bourchier Blvd., 1407 SOFIA,  
Tel. +359 2 689 211, Fax. +359 2 689 102  
Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,  
Tel. +48 22 612 2831, Fax. +48 22 612 2327  
Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,  
Tel. +1 800 234 7381  
Portugal: see Spain  
Romania: see Italy  
China/Hong Kong: 501 Hong Kong Industrial Technology Centre,  
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,  
Tel. +852 2319 7888, Fax. +852 2319 7700  
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,  
Tel. +7 095 755 6918, Fax. +7 095 755 6919  
Colombia: see South America  
Czech Republic: see Austria  
Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,  
Tel. +65 350 2538, Fax. +65 251 6500  
Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,  
Tel. +45 32 88 2636, Fax. +45 31 57 0044  
Slovakia: see Austria  
Slovenia: see Italy  
Finland: Sinikalliontie 3, FIN-02630 ESPOO,  
Tel. +358 9 615800, Fax. +358 9 61580920  
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,  
2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,  
Tel. +27 11 470 5911, Fax. +27 11 470 5494  
France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex,  
Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427  
South America: Al. Vicente Pinzon, 173, 6th floor,  
04547-130 SÃO PAULO, SP, Brazil,  
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,  
Tel. +49 40 23 53 60, Fax. +49 40 23 536 300  
Tel. +55 11 821 2333, Fax. +55 11 821 2382  
Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS,  
Spain: Balmes 22, 08007 BARCELONA,  
Tel. +30 1 4894 339/239, Fax. +30 1 4814 240  
Tel. +34 93 301 6312, Fax. +34 93 301 4107  
Hungary: see Austria  
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,  
Tel. +46 8 5985 2000, Fax. +46 8 5985 2745  
India: Philips INDIA Ltd, Band Box Building, 2nd floor,  
254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,  
Tel. +91 22 493 8541, Fax. +91 22 493 0966  
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,  
Tel. +41 1 488 2741 Fax. +41 1 488 3263  
Indonesia: PT Philips Development Corporation, Semiconductors Division,  
Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,  
Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080  
Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,  
TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874  
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,  
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,  
Tel. +66 2 745 4090, Fax. +66 2 398 0793  
Ireland: Newstead, Clonskeagh, DUBLIN 14,  
Tel. +353 1 7640 000, Fax. +353 1 7640 200  
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,  
Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,  
TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007  
Tel. +90 212 279 2770, Fax. +90 212 282 6707  
Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,  
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,  
20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557  
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461  
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,  
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,  
TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077  
MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421  
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,  
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,  
Tel. +82 2 709 1412, Fax. +82 2 709 1415  
Tel. +1 800 234 7381  
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,  
Tel. +60 3 750 5214, Fax. +60 3 757 4880  
Uruguay: see South America  
Vietnam: see Singapore  
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,  
Tel. +9-5 800 234 7381  
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,  
Tel. +381 11 625 344, Fax.+381 11 635 777  
For all other countries apply to: Philips Semiconductors,  
Internet: http://www.semiconductors.philips.com  
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,  
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825  
© Philips Electronics N.V. 1998  
SCA60  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed  
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license  
under patent- or other industrial or intellectual property rights.  
Printed in The Netherlands  
425102/200/01/pp20  
Date of release: 1998 Aug 24  
Document order number: 9397 750 04069  
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