64
CYM1464
512Kx8 Static RAM Module
constructed using four 256K x 4 static RAMs in SOJ packages
mounted on an epoxy laminate substrate with pins.
Features
• High-density 4-megabit SRAM module
• High-speed CMOS SRAMs
— Access time of 20 ns
Writing to the module is accomplished when the chip select
(CS) and write enable (WE) inputs are both LOW. Data on the
eight input/output pins (I/O0 through I/O7) of the device is writ-
ten into the memory location specified on the address pins (A0
through A18). Reading the device is accomplished by taking
chip select and output enable (OE) LOW, while write enable
(WE) remains inactive or HIGH. Under these conditions, the
contents of the memory location specified on the address pins
(A0 through A18) will appear on the eight appropriate data in-
put/output pins (I/O0 through I/O7).
• Low active power
— 1.93W (max.)
• JEDEC-compatible pinout
• 32-pin, 0.6-inch-wide DIP package
• TTL-compatible inputs and outputs
• Low profile
The input/output pins remain in a high-impedance state unless
the module is selected, outputs are enabled, and write enable
(WE) is HIGH.
— Max. height of 0.34 inches
Functional Description
The CYM1464 is a high-performance 4-megabit static RAM
module organized as 512K words by 8 bits. This module is
Logic Block Diagram
Pin Configuration
DIP
Top View
A − A
0
17
1
2
3
4
32
31
30
29
A
18
A
16
A
14
A
12
V
CC
S
WE
OE
A
15
A
17
WE
5
6
7
8
9
28
27
26
25
24
23
22
21
20
19
18
17
A
A
A
A
A
A
A
A
A
256K x 4
SRAM
256K x 4
SRAM
7
6
5
4
3
2
1
0
0
1
2
13
A
8
A
A
9
11
OE
A
10
10
11
12
13
14
15
16
CS
I/O
I/O
I/O
I/O
I/O
7
6
5
4
3
I/O
I/O
I/O
A
18
1 OF 2
DECODER
256K x 4
SRAM
256K x 4
SRAM
CS
GND
I/O0 − I/O7
Selection Guide
1464-20
1464-22
22
1464-25
1464-30
30
1464-35
1464-45
45
1464-55
Maximum Access Time (ns)
20
25
35
55
Maximum Operating Current (mA)
Maximum Standby Current (mA)
350
240
350
300
300
240
240
240
Cypress Semiconductor Corporation
Document #: 38-05272 Rev. **
•
3901 North First Street
•
San Jose
•
CA 95134
•
408-943-2600
Revised March 15, 2002
