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TYN256P

型号：

TYN256P

描述：

高效节能，低功耗离线式开关[ Energy Efficient, Low Power Off-line Switcher ]

品牌：

POWERINT[ Power Integrations ]

页数：

20 页

PDF大小：

157 K

下载PDF手册
®
TNY256  
TinySwitchTM Plus  
Energy Efficient, Low Power Off-line Switcher  
Product Highlights  
+
+
TinySwitch Plus Features  
• Extended power range  
• Fully integrated auto-restart reduces short circuit current  
Optional  
UV Resistor  
DC Output  
–
• Line under-voltage sense eliminates turn-off glitches  
• Frequency jittering dramatically reduces EMI (5 to 10 dB)  
• TO-220 package option  
Wide-Range  
HV DC Input  
D
EN/UV  
BP  
TinySwitch Plus  
S
Lowest Cost, Low Power Switcher Solution  
• Lower cost than RCC, discrete PWM and other integrated/  
hybrid solutions  
–
PI-2363-022699  
• Cost effective replacement for bulky linear adapters  
• Lowest component count  
Figure 1. Typical Standby Application.  
• Simple ON/OFF control – no loop compensation components  
• No bias winding – simpler, lower cost transformer  
• Designed to work with low cost external components  
OUTPUT POWER CAPABILITY*  
ORDER  
PART  
230 VAC or  
115 VAC  
w/Doubler  
85-265  
VAC  
PACKAGE  
NUMBER  
Extremely Energy Efficient  
DIP-8  
TNY256P  
TNY256G  
TNY256Y  
• Consumes only 30/60 mW at 115/230 VAC with no load  
• Meets Blue Angel, Energy Star, Energy 2000 and  
200mW European cell phone requirements for standby  
• Saves $1 to $4 per year in energy costs (at $0.12/kWHr)  
compared to bulky linear adapters  
8-15 W  
8-19 W  
5-10 W  
5-11 W  
SMD-8  
TO-220-7B  
Table 1. * The low end of the power ranges shown represent enclosed  
adapters with minimal heat sinking whereas, the high end of the power  
ranges represent open frame power supplies with adequate heat  
sinking, both measured at an ambient of 50 oC. Please refer to the Key  
Application Considerations section for more details.  
• Ideal for cellular phone chargers and adapters  
High Performance at Low Cost  
• High voltage powered – ideal for charger applications  
• High bandwidth provides fast turn on with no overshoot  
• Current limit operation rejects line frequency ripple  
• Built-in current limit and thermal protection  
TheTinySwitchPlus incorporatesauto-restart, lineunder-voltage  
sense, and frequency jittering features. The auto-restart circuit  
safely limits output power during fault conditions such as output  
short or open loop. The auto-restart circuit is fully integrated and  
does not require external timing components. The line under-  
voltagesensethresholdcanbeexternallyprogrammedusingaline  
senseresistor. Duringstart-up, thisfeaturekeepstheTNY256off  
until the input line voltage reaches the under-voltage threshold.  
When the input line voltage is removed, the line under-voltage  
circuit prevents auto-restart attempts after the output goes out of  
regulation. This eliminates power down glitches caused by the  
slow discharge of input storage capacitors present in applications  
such as standby supplies. A single resistor is used to implement  
thisfeature,eliminatingwhatnormallytakesfivetosixcomponents.  
Thelinesenseresistorisoptional.TheTNY256operatingfrequency  
of130kHzisjittered(frequencymodulated)toreducebothquasi-  
peak and average EMI, minimizing filtering costs.  
Description  
The TNY256 extends the power range of the TinySwitch family  
of energy efficient, low power off-line switchers. TinySwitch  
devices use a breakthrough design to provide the lowest cost,  
high efficiency, off-line switching solution for low power  
applications. Theyintegratea700VpowerMOSFET,oscillator,  
high voltage switched current source, current limit and thermal  
shutdowncircuitryintoasingle,monolithicdevice. Thedevices  
start-upandoperateonpowerderivedfromtheDRAINvoltage,  
eliminatingtheneedforatransformerbiaswindingandassociated  
circuitry. TinySwitch's low operating current allows power  
supply no-load consumption to be kept under 100 mW, even at  
265 VAC input.  
August 1999  
TNY256  
BYPASS  
(BP)  
DRAIN  
(D)  
REGULATOR  
5.8 V  
LINE UNDER-VOLTAGE  
50 µA  
AUTO-  
BYPASS PIN  
UNDER-VOLTAGE  
RESTART  
COUNTER  
+
-
CLOCK  
5.8 V  
5.1 V  
RESET  
+
-
V
I
LIMIT  
JITTER  
CLOCK  
1.5 V + V  
TH  
DC  
MAX  
THERMAL  
SHUTDOWN  
OSCILLATOR  
ENABLE/  
UNDER-VOLTAGE  
(EN/UV)  
1.5 V  
S
R
Q
Q
LEADING  
EDGE  
BLANKING  
SOURCE  
(S)  
PI-2367-122398  
Figure 2. Functional Block Diagram.  
Tab Internally  
Connected to Source Pin  
Pin Functional Description  
DRAIN (D) Pin:  
Power MOSFET drain connection. Provides internal operating  
current for both start-up and steady-state operation.  
7 D  
5 NC  
4 S  
3 BP  
1 EN/UV  
BYPASS (BP) Pin:  
Connection point for a 0.1 µF external bypass capacitor for the  
internally generated 5.8 V supply.  
TO-220 (YO7B)  
ENABLE/UNDER-VOLTAGE (EN/UV) Pin:  
1
2
3
4
8
7
6
5
S
S
S
D
BP  
S
Thispinhasdualfunctions, enableinputandlineunder-voltage  
sense. During normal operation, switching of the power  
MOSFET is controlled by this pin. MOSFET switching is  
terminated when a current greater than 50 µA is drawn out of  
this pin. This pin also senses line under-voltage conditions  
through an external resistor connected to the DC line voltage.  
If there is no external resistor connected to this pin, TNY256  
detects this and disables the line under-voltage function.  
S
EN/UV  
DIP-8 (PO8A)  
SMD-8 (GO8A)  
PI-2500-072199  
Figure 3. Pin Configuration.  
SOURCE (S) Pin:  
NO CONNECT (N) Pin  
Power MOSFET source connection. Primary return.  
No connection.  
B
2
8/99  
TNY256  
50 µA, a low logic level (disable) is generated at the output of  
the enable circuit. This output is sampled at the beginning of  
each cycle on the rising edge of the clock signal. If high, the  
powerMOSFETisturnedonforthatcycle(enabled),otherwise  
thepowerMOSFETremainsoff(disabled). Sincethesampling  
is done only at the beginning of each cycle, subsequent  
changes in the EN/UV pin voltage or current during the  
remainder of the cycle are ignored.  
TinySwitch Functional Description  
TinySwitch combines a high voltage power MOSFET switch  
withapowersupplycontrollerinonedevice. Unlikeconventional  
PWM (Pulse Width Modulator) controllers, TinySwitch uses a  
simple ON/OFF control to regulate the output voltage.  
The TNY256 controller consists of an Oscillator, Enable (Sense  
and Logic) circuit, 5.8 V Regulator, Bypass pin Under-Voltage  
circuit, Over Temperature Protection, Current Limit circuit,  
Leading Edge Blanking and a 700 V power MOSFET. The  
TNY256incorporatesadditionalcircuitryforLineUnder-Voltage  
Sense, Auto-Restart and Frequency Jitter. Figure 2 shows the  
functional block diagram with the most important features.  
Under most operating conditions (except when close to no-  
load), the low impedance of the source follower, keeps the  
voltageontheEN/UVpinfromgoingmuchbelow1.5V,inthe  
disabled state. This improves the response time of the  
optocoupler that is usually connected to this pin.  
5.8 V Regulator  
Oscillator  
The 5.8 V regulator charges the bypass capacitor connected to  
theBYPASSpinto5.8Vbydrawingacurrentfromthevoltage  
on the DRAIN, whenever the MOSFET is off. The BYPASS  
pin is the internal supply voltage node for the TinySwitch.  
WhentheMOSFETison,theTinySwitchrunsoffoftheenergy  
stored in the bypass capacitor. Extremely low power  
consumption of the internal circuitry allows the TinySwitch to  
operate continuously from the current drawn from the DRAIN  
pin. A bypass capacitor value of 0.1 µF is sufficient for both  
high frequency de-coupling and energy storage.  
The typical oscillator frequency is internally set to an average of  
130 kHz. Two signals are generated from the oscillator, the  
Maximum Duty Cycle signal (DCMAX) and the Clock signal that  
indicates the beginning of each cycle.  
The TNY256 oscillator incorporates circuitry that introduces a  
small amount of frequency jitter, typically 5 kHz peak-to-peak,  
tominimizeEMIemission. Themodulationrateofthefrequency  
jitter (1 kHz) is set to optimize EMI reduction for both average  
and quasi-peak emissions. The frequency jitter should be  
measured with the oscilloscope triggered at the falling edge of  
theDRAINwaveform. ThewaveforminFigure4illustratesthe  
frequency jitter of the TNY256.  
BYPASS Pin Under-Voltage  
The BYPASS pin under-voltage circuitry disables the power  
MOSFET when the BYPASS pin voltage drops below 5.1 V.  
Once the BYPASS pin voltage drops below 5.1 V, it must rise  
back to 5.8 V to enable (turn-on) the power MOSFET.  
Enable Input Circuit  
The enable input circuit at the EN/UV pin consists of a low  
impedance source follower output set at 1.5 V. The current  
through the source follower is limited to 50 µA with 10 µA of  
hysteresis. When the current drawn out of the this pin exceeds  
Over Temperature Protection  
The thermal shutdown circuitry senses the die temperature.  
The threshold is set at 135 oC with 70 oC hysteresis. When the  
die temperature rises above this threshold (135 oC) the power  
MOSFET is disabled and remains disabled until the die  
temperature falls by 70 oC, at which point it is re-enabled.  
600  
500  
V
Current Limit  
400  
The current limit circuit senses the current in the power  
MOSFET. When this current exceeds the internal threshold  
(ILIMIT), the power MOSFET is turned off for the remainder of  
that cycle.  
300  
200  
100  
The leading edge blanking circuit inhibits the current limit  
comparator for a short time (tLEB) after the power MOSFET is  
turnedon. Thisleadingedgeblankingtimehasbeensetsothat  
current spikes caused by primary-side capacitance and  
secondary-side rectifier reverse recovery time will not cause  
premature termination of the switching pulse.  
0
132.5 kHz  
127.5 kHz  
.5  
1
0
Time (µs)  
Auto-Restart  
Intheeventofafaultconditionsuchasoutputoverload, output  
Figure 4. Frequency Jitter.  
B
3
8/99  
TNY256  
short, or an open loop condition, TNY256 enters into auto-  
restart operation. An internal counter clocked by the oscillator  
gets reset every time the EN/UV pin is pulled low. If the EN/  
UV pin is not pulled low for 32 ms, the power MOSFET  
switching is disabled for 128 ms (except in the case of line  
under-voltage condition). The auto-restart alternately enables  
anddisablestheswitchingofthepowerMOSFETuntilthefault  
condition is removed. Figure 5 illustrates auto-restart circuit  
operation in the presence of a temporary output short.  
DRAIN  
VOLTAGE  
300  
200  
100  
0
20  
OUTPUT  
VOLTAGE  
Intheeventoflineunder-voltagecondition,theswitchingofthe  
power MOSFET is disabled beyond its normal 128 ms time  
until the line under-voltage condition goes away.  
10  
0
Line Under-Voltage (UVLO) Sense Circuit  
250  
Time (ms)  
500  
0
The DC line voltage can be monitored by connecting an  
external resistor from the DC line to the EN/UV pin. During  
power-up or when the switching of the power MOSFET is  
disabled in auto-restart, the current into the EN/UV pin must  
exceed 50 µA to initiate switching of the power MOSFET.  
During power-up, this is implemented by holding the BYPASS  
pin to 5.1 V while the line under-voltage condition exists. The  
BYPASSpinthenrisesfrom5.1Vto5.8Vwhenthelineunder-  
voltage condition goes away. When the switching of the power  
MOSFET is disabled in auto-restart mode and the line under-  
voltage condition exists, the counter is stopped. This stretches  
the disable time beyond its normal 128ms until the line under-  
voltage condition goes away.  
Figure 5. TNY256 Auto-Restart Operation.  
TinySwitch Operation  
TinySwitch devices operate in the current limit mode. When  
enabled, the oscillator turns the power MOSFET on at the  
beginning of each cycle. The MOSFET is turned off when the  
current ramps up to the current limit. The maximum on-time of  
the MOSFET is limited to DCMAX by the oscillator. Since the  
current limit and frequency of the TNY256 is constant, the  
powerdeliveredisproportionaltotheprimaryinductanceofthe  
transformer and is relatively independent of the input voltage.  
Therefore, the design of the power supply involves calculating  
the primary inductance of the transformer for the maximum  
power required. If the TNY256 is appropriately chosen for the  
The line under-voltage circuit also detects when there is no  
external resistor connected to the EN/UV pin. In this case the  
line under-voltage function is disabled.  
V
V
EN  
EN  
CLOCK  
CLOCK  
D
D
MAX  
MAX  
I
I
DRAIN  
DRAIN  
V
DRAIN  
V
DRAIN  
PI-2373-120998  
PI-2377-120998  
Figure 7. TNY256 Operation at Light Load.  
Figure 6. TNY256 Operation at Heavy Load.  
B
4
8/99  
TNY256  
200  
100  
200  
100  
V
V
DC-BUS  
DC-BUS  
0
0
10  
10  
V
V
5
0
BYPASS  
DRAIN  
5
0
BYPASS  
DRAIN  
400  
200  
0
400  
200  
0
V
V
1
2
0
1
2
0
Time (ms)  
Time (ms)  
Figure 8. TNY256 Power-up With External Resistor (2 MΩ)  
Figure 9. TNY256 Power-up Without External Resistor Connected  
to EN/UV Pin.  
Connected to EN/UV Pin.  
powerlevelatthelowestinputvoltage,thecalculatedinductance  
will ramp up the current to the current limit before the DCMAX  
limit is reached.  
ON/OFF Control  
The internal clock of the TNY256 runs all the time. At the  
beginning of each clock cycle, it samples the EN/UV pin to  
decide whether or not to implement a switch cycle. If the EN/  
UV pin is high (< 40 µA), then a switching cycle takes place. If  
the EN/UV pin is low (greater than 50 µA) then no switching  
cycle occurs, and the EN/UV pin status is sampled again at the  
start of the subsequent clock cycle.  
Enable Function  
TNY256 senses the EN/UV pin to determine whether or not to  
proceed with the next switch cycle as described earlier. Once  
a cycle is started, it always completes the cycle (even when the  
EN/UV pin changes state half way through the cycle). This  
operation results in a power supply whose output voltage ripple  
is determined by the output capacitor, amount of energy per  
switch cycle and the delay of the feedback.  
At full load, TNY256 will conduct during the majority of its  
clock cycles (Figure6). At loads less than full load, it will  
“skip”morecyclesinordertomaintainvoltageregulationatthe  
secondaryoutput. Atlightloadornoload, almostallcycleswill  
be skipped (Figure7). A small percentage of cycles will  
conducttosupportthepowerconsumptionofthepowersupply.  
The EN/UV pin signal is generated on the secondary by  
comparing the power supply output voltage with a reference  
voltage. The EN/UV pin signal is high when the power supply  
output voltage is less than the reference voltage.  
The response time of the TNY256 ON/OFF control scheme is  
veryfastcomparedtonormalPWMcontrol. Thisprovidestight  
regulation and excellent transient response.  
In a typical implementation, the EN/UV pin is driven by an  
optocoupler. The collector of the optocoupler transistor is  
connected to the EN/UV pin and the emitter is connected to the  
SOURCEpin. TheoptocouplerLEDisconnectedinserieswith  
a Zener across the DC output voltage to be regulated. When the  
output voltage exceeds the target regulation voltage level  
(optocoupler diode voltage drop plus Zener voltage), the  
optocoupler diode will start to conduct, pulling the EN/UV pin  
low. The Zener can be replaced by a TL431 device for  
improved accuracy.  
Power Up/Down  
The TNY256 requires only a 0.1 µF capacitor on the BYPASS  
pin. Because of the small size of this capacitor, the power-up  
delay is kept to an absolute minimum, typically 0.3 ms. Due to  
the fast nature of the ON/OFF feedback, there is no overshoot  
at the power supply output. When an external resistor (2 MΩ)  
is connected to the EN/UV pin, the power MOSFET switching  
will be delayed during power-up until the DC line voltage  
exceeds the threshold (100 V). Figures 8 and 9 illustrate the  
power-up timing waveform of TNY256 in applications with  
and without an external resistor (2 MΩ) connected to the  
EN/UV pin.  
The EN/UV pin pull-down current threshold is nominally  
50 µA, but is set to 40 µA the instant the threshold is exceeded.  
This is reset back to 50 µA when the EN/UV pull-down current  
drops below the current threshold of 40 µA.  
During power-down, when an external resistor is used, the  
B
5
8/99  
TNY256  
200  
100  
200  
100  
V
DC-BUS  
0
0
400  
300  
400  
300  
V
200  
100  
0
200  
100  
0
DRAIN  
.5  
1
2.5  
5
0
0
Time (s)  
Time (s)  
Figure 11. Slow Power-down Timing with External (2 MΩ)  
Figure 10. Normal Power-down Timing.  
Resistor Connected to EN/UV Pin.  
power MOSFET will switch for 32 ms after the output loses  
regulation. The power MOSFET will then remain off without  
any glitches since the under-voltage function prohibits restarts  
when the line voltage is low.  
Application Example  
The TNY256 is ideal for low cost, high efficiency power  
supplies in a wide range of applications such as PC standby,  
cellular phone chargers, AC adapters, motor control, appliance  
controlandISDNnetworktermination. The130 kHzoperation  
allows the use of a low cost EE16 core transformer while still  
providing good efficiency. The frequency jitter in TNY256  
makes it possible to use a single inductor (or two small resistors  
if lower efficiency is acceptable) in conjunction with two input  
capacitors for input EMI filtering up to the 10W level. The  
auto-restart function allows the design to be optimized for  
maximum efficiency without consideration for short-circuit  
current on the secondary. For applications requiring under-  
voltage lockout (UVLO), the TNY256 eliminates several  
components and saves cost.  
Figure 10 illustrates a typical power-down timing waveform of  
TNY256. Figure 11 illustrates a very slow power-down timing  
waveform of TNY256 as in standby applications. The external  
resistor (2 MΩ) is connected to the EN/UV pin in this case to  
prevent restarts.  
The TNY256 does not require a bias winding to provide power  
tothechip,becauseitdrawsthepowerdirectlyfromtheDRAIN  
pin (see Functional Description above). This has two main  
benefits. First, for a nominal application, this eliminates the  
cost of an extra bias winding and associated components.  
Secondly, for charger applications, the current-voltage  
characteristic often allows the output voltage to fall to low  
values while still delivering power. This type of application  
normally requires a forward-bias winding which has many  
more associated components, none of which are necessary with  
the TNY256.  
As an example, Figure12 shows a 9 V, 0.6 A, AC adapter  
operating from a universal input range (85-265 VAC). The AC  
input is rectified and filtered by D1-D4, C1 and C2 to create a  
high voltage DC bus which is connected to T1. Inductor L1  
formsa pi-filterinconjunctionwithC1andC2. The resistorR1  
damps resonance in inductor L1. The frequency jitter in  
TNY256allowsit tomeetworldwideconductedEMIstandards  
using a simple pi-filter in combination with a small value  
Y1-capacitor C5 and a shield winding between primary and  
secondarywindingsinsidetransformerT1. DiodeD5,capacitor  
C3 and resistor R3 form an RCD clamp circuit that limits the  
turn-off voltage spike to a safe value on the TNY256 DRAIN  
pin.  
Current Limit Operation  
Each switching cycle is terminated when the DRAIN current  
reaches the current limit of the TNY256. For a given primary  
inductance and input voltage, the duty cycle is constant.  
However, the duty cycle does change inversely with the input  
voltage providing “voltage feed-forward” advantages: good  
line ripple rejection and relatively constant power delivery  
independent of the input voltage.  
The secondary winding is rectified and filtered by D6, C6 and  
C7 to provide the 9 V output. Additional filtering is provided  
by L3 and C8. The output voltage is determined by the resistor  
network R7 and R8. Resistor R9 maintains a bias current  
BYPASS Pin Capacitor  
The BYPASS pin uses a small 0.1 µF ceramic capacitor for  
decoupling the internal power supply of the TNY256.  
B
6
8/99  
TNY256  
T1  
NC  
2
1
L1  
D6  
L3  
470 µH  
MBR360  
18 µH  
10  
+ 9 V  
0.6 A  
C7  
330 µF  
16 V  
C8  
220 µF  
10 V  
C6  
C3  
10 nF  
330 µF  
16 V  
R3  
330 KΩ  
1/4 W  
RTN  
8
4
D1  
1N4005  
D2  
1N4005  
R1  
4.7 KΩ  
D5  
1N4937  
TinySwitch Plus  
D
S
EN/UV  
R5  
100 Ω  
U1  
TNY256P  
BP  
R9  
470 Ω  
R7  
26.1 KΩ  
85-265  
VAC  
RF1  
10 Ω  
C1  
10 µF  
C2  
10 µF  
C11  
0.1 µF  
400 V 400 V  
U2  
SFH615-2  
Fusible  
C4  
0.1 µF  
D3  
1N4005  
D4  
1N4005  
U3  
TL431CLP  
R8  
10 KΩ  
C5  
2200 pF  
Y1 Safety  
PI-2502-072699  
Figure 12. 5.5 W AC Adaptor with Universal Input (85-265 VAC).  
through the TL431 voltage reference for proper regulation.  
Capacitor C11 bypasses the TL431 response for improved  
ripple performance. Resistor R5 determines the AC gain of the  
circuit.  
The maximum power capability of TinySwitch in a given  
application depends on the thermal environment (sealed  
enclosure, ventilated, open frame, etc.,), transformer core size  
and design (continuous or discontinuous), efficiency required,  
minimum specified input voltage, input storage capacitance,  
output voltage, output diode forward drop, etc., and can be  
different from the values shown in Table 1.  
Key Application Considerations  
For the most up to date information visit our website  
at: www.powerint.com  
Audible Noise  
At loads other than maximum load, the cycle skipping mode  
operation used in TinySwitch can generate audio frequency  
components in the transformer. This can cause the transformer  
to produce audio noise. Transformer audible noise can be  
reduced by using appropriate transformer construction  
techniques and decreasing the peak flux density. For more  
information on audio suppression techniques, please check the  
ApplicationNotessectiononourwebsiteatwww.powerint.com.  
Design  
Output Power  
Table1showsthepracticalmaximumcontinuousoutputpower  
levels obtainable under following conditions:  
1. TheminimumDCinputvoltageis90Vorhigherfor85VAC  
input or 240 V or higher for 230VAC input or 115 VAC  
input with a voltage doubler. This corresponds to a filter  
capacitor of 3 µF/W for universal input and 1 µF/W for 230  
or 115 VAC w/doubler input.  
Ceramic capacitors that use dielectrics such as Z5U, when used  
inclampandsnubbercircuits, canalsogenerateaudionoisedue  
to electrostriction and piezo-electric effects. If this is the case,  
replacing them with a capacitor having a different type of  
dielectricisthesimplestsolution. Polyesterfilmcapacitorsand  
ceramic capacitors with dielectrics such as NPO or X7R are  
good alternatives.  
2. A secondary output of 5 V with a Schottky rectifier diode.  
3. The P and G packaged parts are board mounted with source  
pinssolderedtosufficientareaofcopperandtheYpackaged  
parts are heat sinked sufficiently to keep the die temperature  
at or below 100 oC.  
B
7
8/99  
TNY256  
Y-Capacitor  
Layout  
The placement of the Y-capacitor should be directly from the  
primary single point ground to the common/return terminal on  
the secondary side. Such placement will maximize the EMI  
benefit of the Y-capacitor.  
Single Point Grounding  
UseasinglepointgroundconnectionattheSOURCEpinforthe  
BYPASS pin capacitor and the Input Filter Capacitor (see  
Figure 13).  
Optocoupler  
It is important to maintain the minimum circuit path from the  
optocoupler transistor to the TinySwitch EN/UV and SOURCE  
pins to minimize noise coupling.  
Primary Loop Area  
The area of the primary loop that connects the input filter  
capacitor,transformerprimaryandTinySwitchtogether,should  
be kept as small as possible.  
Output Diode  
For best performance, the area of the loop connecting the  
secondary winding, the Output Diode and the Output Filter  
Capacitor, should be minimized. See Figure13 for optimized  
layout. In addition, sufficient copper area should be provided  
at the anode and cathode terminals of the diode to adequately  
heatsink the diode under output short circuit conditions.  
Primary Clamp Circuit  
Aclamporsnubbercircuitisusedtominimizepeakvoltageand  
ringing on the DRAIN pin at turn-off. This can be achieved by  
using an RC snubber for less than 3 W or an RCD clamp as  
shown in Figure 13 for higher power. A Zener and diode clamp  
across the primary or a single 550V Zener clamp from DRAIN  
to SOURCE can also be used. In all cases care should be taken  
tominimizethecircuitpathfromthesnubber/clampcomponents  
to the transformer and TinySwitch.  
Input and Output Filter Capacitors  
There are constrictions in the traces connected to the input and  
output filter capacitors. These constrictions are present for two  
reasons. The first is to force all the high frequency currents to  
flow through the capacitor (if the trace were wide then it could  
flowaroundthecapacitor). Secondly,theconstrictionsminimize  
the heat transferred from the TinySwitch to the input filter  
capacitor and from the secondary diode to the output filter  
capacitor. The common/return (the negative output terminal in  
Figure13) terminal of the output filter capacitor should be  
connected with a short, low resistance path to the secondary  
winding. In addition, the common/return output connection  
shouldbetakendirectlyfromthesecondarywindingpinandnot  
from the Y-capacitor connection point.  
Thermal Considerations  
CopperunderneaththeTinySwitchactsnotonlyasasinglepoint  
ground, but also as a heatsink. The hatched area shown in  
Figure13 should be maximized for good heat-sinking of  
TinySwitch and output diode.  
EN/UV pin layout optimization  
The EN/UV pin connection to the opto-coupler should be kept  
to an absolute minimum (less than 0.5 in.), and this connection  
should be kept away from the DRAIN pin (minimum of 0.2 in.).  
These distance limitations are critical only in applications  
where an external under-voltage resistor (2 MΩ) is not used.  
Safety Spacing  
Input Filter Capacitor  
Transformer  
Output Filter Capacitor  
+
HV  
SEC  
PRI  
–
S
D
TOP VIEW  
Y1-  
Maximize hatched copper  
Capacitor  
DC  
Out  
–
+
TinySwitch  
areas (  
) for optimum  
heat sinking  
CBP  
Opto-  
coupler  
S
BP  
EN/UV  
PI-2360-012199  
Figure 13. Recommended PC Layout for TinySwitch without Under-Voltage Lock Out Resister.  
B
8
8/99  
TNY256  
ABSOLUTE MAXIMUM RATINGS(1)  
DRAIN Voltage ....................................... - 0.3 V to 700 V BYPASS Voltage .......................................... -0.3 V to 9 V  
Peak DRAIN Current .............................................800 mA Storage Temperature ..................................... -65 to 125 °C  
EN/UV Voltage ............................................ - 0.3 V to 9 V Operating Junction Temperature(2) ................ -40 to 150 °C  
EN/UV Current ......................................................100 mA Lead Temperature(3) ................................................ 260 °C  
1. All voltages referenced to SOURCE, TA = 25 °C.  
3. 1/16" from case for 5 seconds.  
2. Normally limited by internal circuitry.  
THERMAL IMPEDANCE  
Thermal Impedance: Y Package (θJA)(1) ............... 70 °C/W  
1. Free standing with no heatsink.  
(θJC)(2) ................. 2 °C/W  
2. Measured at tab closest to plastic interface or source pin.  
3. Soldered to 0.36 sq. inch (232mm2), 2oz (610 gm/m2) copper  
clad.  
4. Soldered to 1 sq. inch (645mm2), 2oz. (610 gm/m2) copper clad  
P/G Package:  
(θJA) ........ 45 °C/W(3); 35 °C/W(4)  
(θJC)(2) ............................ 5 °C/W  
Conditions  
SOURCE = 0 V; Tj = -40 to 125 °C  
Parameter  
Symbol  
Min  
Typ Max  
Units  
See Figure 14  
(Unless Otherwise Specified)  
CONTROL FUNCTIONS  
Average  
115  
3.8  
130  
5.0  
140  
6.2  
Tj = 25 °C  
See Figure 4  
Output  
fOSC  
DCMAX  
IDIS  
kHz  
%
Frequency  
Peak-Peak Jitter  
Maximum  
Duty Cycle  
63  
66  
69  
S1 Open  
Tj = -40 °C to 125 °C  
Tj = 125 °C  
-68  
-68  
-50  
-52  
-28  
-41  
EN/UV Pin Turnoff  
Threshold Current  
µA  
µA  
V
EN/UV Pin  
IHYS  
VEN  
IENSC  
IS1  
See Note 1  
-15  
-10  
-5  
Hysteresis Current  
IEN/UV = -25 µA  
IEN/UV = 25 µA  
1.10  
1.85  
-58  
1.45  
2.70  
-40  
1.80  
3.25  
-25  
EN/UV Pin  
Voltage  
VEN/UV = 0 V, Tj = -40 °C to 125 °C  
EN/UV Short-  
Circuit Current  
µA  
µA  
µA  
mA  
mA  
-58  
-35  
VEN/UV = 0 V, Tj = 125 °C  
-45  
VEN/UV = 0 V  
(MOSFET Not Switching)  
See Note 2  
215  
170  
255  
DRAIN  
Supply Current  
EN/UV Open  
IS2  
300  
-3.75  
-2.25  
(MOSFET Switching)  
See Note 2, 3  
VBP = 0 V, Tj = 25 °C  
ICH1  
-7.50  
-6.00  
-5.50  
-4.10  
See Note 4,5  
BYPASS Pin  
Charge Current  
VBP = 4 V, Tj = 25 °C  
ICH2  
See Note 4,5  
B
9
8/99  
TNY256  
Conditions  
Parameter  
Symbol SOURCE = 0 V; Tj = -40 to 125 °C  
See Figure 14  
Min  
Units  
Typ  
Max  
(Unless Otherwise Specified)  
CONTROL FUNCTIONS (cont.)  
BYPASS Pin  
VBP  
See Note 4  
V
V
5.60  
0.60  
6.10  
0.85  
5.85  
0.72  
Voltage  
BYPASS  
Hysteresis  
VBPH  
EN/UV Pin Line  
ILUV  
µA  
Tj = 25 °C  
44  
50  
55  
Under-voltage  
Threshold  
CIRCUIT PROTECTION  
di/dt = 120 mA/µs, Tj = 25 °C  
ILIMIT  
450  
500  
550  
mA  
mA  
ns  
Current Limit  
See Note 7  
See Figure 17  
Initial Current  
Limit  
0.65 x  
lLIMIT(MIN)  
IINIT  
Tj = 25 °C  
Tj = 25 °C  
Leading Edge  
Blanking Time  
170  
215  
100  
135  
70  
tLEB  
See Note 8  
Tj = 25 °C  
Current Limit  
Delay  
150  
145  
tILD  
ns  
See Note 8, 9  
Thermal Shutdown  
Temperature  
125  
°C  
°C  
Thermal Shutdown  
Hysteresis  
OUTPUT  
Tj = 25 °C  
Tj = 100 °C  
15.6  
25.7  
18.0  
30.0  
ON-State  
Resistance  
RDS(ON)  
ID = 50 mA  
Ω
VBP = 6.2 V, VEN/UV = 0 V,  
OFF-State  
Leakage  
IDSS  
µA  
50  
VDS = 560 V, Tj = 125 °C  
VBP = 6.2 V, VEN/UV = 0 V,  
Breakdown  
Voltage  
BVDSS  
700  
V
IDS = 100 µA, Tj = 25 °C  
tr  
tf  
ns  
ns  
50  
50  
Rise Time  
Fall Time  
Measured in a Typical Flyback  
Converter Application.  
B
10  
8/99  
TNY256  
Conditions  
Parameter  
Symbol SOURCE = 0 V; Tj = -40 to 125 °C  
See Figure 14  
Max  
Min  
Units  
Typ  
(Unless Otherwise Specified)  
OUTPUT (cont.)  
DRAIN Supply  
Voltage  
50  
V
Output EN/UV  
Delay  
µs  
µs  
tEN/UV  
tDST  
tAR  
See Note 8  
10  
Output Disable  
Setup Time  
0.5  
32.0  
20  
Tj = 25 °C  
Auto-Restart,  
ON-Time  
ms  
%
28.9  
16  
35.2  
24  
See Note 10  
Auto-Restart  
Duty Cycle  
DCAR  
NOTES:  
1. For a threshold with a negative value, negative hysteresis is a decrease in magnitude of the corresponding threshold.  
2. Total current consumption is the sum of IS1 and IDSS when EN/UV pin is shorted to ground (MOSFET not switching)  
and the sum of IS2 and IDSS when EN/UV pin is open (MOSFET switching).  
3. Since the output MOSFET is switching, it is difficult to isolate the switching current from the supply current at the  
DRAIN. An alternative is to measure the BYPASS pin current at 6.2 V.  
4. BYPASS pin is not intended for sourcing supply current to external circuitry.  
5. See typical performance characteristics section for BYPASS pin start-up charging waveform.  
6. For current limit at other di/dt values, refer to current limit vs. di/dt curve under typical performance  
characteristics.  
7. This parameter is derived from characterization.  
8. This parameter is derived from the change in current limit measured at 5X and 10X of the di/dt shown in the ILIMIT  
specification.  
9. Auto-restart on time has the same temperature characteristics as the oscillator (inversely proportional to  
frequency).  
B
11  
8/99  
TNY256  
470 Ω  
5 W  
S2  
470 Ω  
EN/UV  
S
D
S
S1  
2 MΩ  
S
S
S
50 V  
10 V  
BP  
150 V  
0.1 µF  
NOTE: This test circuit is not applicable for current limit or output characteristic measurements.  
PI-2352-011899  
Figure 14. TinySwitch General Test Circuit.  
DC  
(internal signal)  
MAX  
t
2
t
1
t
P
HV  
90%  
90%  
EN/UV  
t
t
DRAIN  
VOLTAGE  
1
2
D =  
t
EN/UV  
V
DRAIN  
10%  
1
0 V  
tP  
=
fOSC  
PI-2048-050798  
PI-2364-012699  
Figure 15. TinySwitch Duty Cycle Measurement.  
Figure 16. TinySwitch Output Enable Timing.  
t
(Blanking Time)  
LEB  
1.3  
1.2  
1.1  
1.0  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
I
INIT(MIN)  
I
I
@ 25 ˚C  
@ 25 ˚C  
LIMIT(MAX)  
LIMIT(MIN)  
0
0
1
2
3
4
5
6
7
8
Time (µs)  
Figure 17. Current Limit Envelope.  
B
12  
8/99  
TNY256  
Typical Performance Characteristics  
BREAKDOWN vs. TEMPERATURE  
FREQUENCY vs. TEMPERATURE  
1.1  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
1.0  
0.9  
0
-50 -25  
0
25 50 75 100 125 150  
-50 -25  
0
25  
50 75 100 125  
Junction Temperature (°C)  
Junction Temperature (°C)  
CURRENT LIMIT vs. TEMPERATURE  
CURRENT LIMIT vs. di/dt  
1.4  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
0.0  
-50 -25  
0
25  
50  
75 100 125  
0
240  
480  
720  
960  
1200  
Temperature (°C)  
di/dt in mA/µs  
BYPASS PIN START-UP WAVEFORM  
OUTPUT CHARACTERISTIC  
7
600  
6
5
TCASE=25°C  
TCASE=100°C  
500  
400  
300  
200  
100  
0
4
3
2
1
0
0
0.2  
0.4  
0.6  
0.8  
1.0  
0
2
4
6
8
10  
Time (ms)  
DRAIN Voltage (V)  
B
13  
8/99  
TNY256  
Typical Performance Characteristics (cont.)  
C
vs. DRAIN VOLTAGE  
DRAIN CAPACITANCE POWER  
OSS  
100  
100  
80  
60  
40  
20  
0
10  
1
0
200  
400  
600  
0
200  
400  
600  
DRAIN Voltage (V)  
DRAIN Voltage (V)  
UNDERVOLTAGE THRESHOLD  
80  
Power-up*  
40  
Power-down at 8 W**  
* 2 MΩ resistor connected to EN/UV pin.  
** Load dependant and determined by the level  
of the device upon entering auto-restart.  
0
-40 -20  
0
20 40 60 80  
110  
100  
Temperature (°C)  
B
14  
8/99  
TNY256  
Notes  
B
15  
8/99  
TNY256  
Notes  
B
16  
8/99  
TNY256  
Notes  
B
17  
8/99  
TNY256  
P08A  
Plastic DIP-8  
D S .004 (.10)  
DIM  
inches  
mm  
8
5
-E-  
A
B
C
G
H
0.370-0.385  
0.245-0.255  
0.125-0.135  
0.015-0.040  
0.120-0.135  
9.40-9.78  
6.22-6.48  
3.18-3.43  
0.38-1.02  
3.05-3.43  
B
J1 0.060 (NOM) 1.52 (NOM)  
J2  
K
L
0.014-0.022  
0.010-0.012  
0.090-0.110  
0.030 (MIN)  
0.300-0.320  
0.300-0.390  
0.300 BSC  
0.36-0.56  
0.25-0.30  
2.29-2.79  
0.76 (MIN)  
7.62-8.13  
7.62-9.91  
7.62 BSC  
M
N
P
1
4
A
-D-  
-F-  
M
J1  
N
Q
Notes:  
C
1. Package dimensions conform to JEDEC  
specification MS-001-AB for standard dual  
in-line (DIP) package .300 inch row spacing  
(PLASTIC) 8 leads (issue B, 7/85)..  
2. Controlling dimensions are inches.  
3. Dimensions shown do not include mold  
flash or other protrusions. Mold flash or  
protrusions shall not exceed .006 (.15) on  
any side.  
H
K
G
Q
J2  
4. D, E and F are reference datums on the  
molded body.  
L
P
PI-2076-031197  
G08A  
Plastic SMD-8  
D S .004 (.10)  
DIM  
inches  
mm  
8
5
-E-  
A
B
C
G
H
0.370-0.385  
0.245-0.255  
0.125-0.135  
0.004-0.012  
0.036-0.044  
9.40-9.78  
6.22-6.48  
3.18-3.43  
0.10-0.30  
0.91-1.12  
E S .010 (.25)  
P
B
J1 0.060 (NOM) 1.52 (NOM)  
J2  
J3  
J4  
K
0.048-0.053  
0.032-0.037  
0.007-0.011  
0.010-0.012  
0.100 BSC  
0.030 (MIN)  
0.372-0.388  
0-8˚  
1.22-1.35  
0.81-0.94  
0.18-0.28  
0.25-0.30  
2.54 BSC  
0.76 (MIN)  
9.45-9.86  
0-8˚  
1
4
L
L
A
-D-  
M
P
M
J1  
α
C
Notes:  
K
1. Package dimensions conform to JEDEC  
specification MS-001-AB (issue B, 7/85)  
except for lead shape and size.  
2. Controlling dimensions are inches.  
3. Dimensions shown do not include mold  
flash or other protrusions. Mold flash or  
protrusions shall not exceed .006 (.15) on  
any side.  
-F-  
.004 (.10)  
J3  
J4  
.010 (.25) M A S  
α
G
H
J2  
4. D, E and F are reference datums on the  
molded body.  
PI-2077-050798  
B
18  
8/99  
TNY256  
Y07B  
Plastic TO-220-7B  
N
K
mm  
DIM  
inches  
B
D
11.86-12.37  
10.16-10.54  
3.71-3.96  
2.74 REF.  
.66-.81  
A
B
.467-.487  
.400-.415  
.146 - .156  
.108 REF.  
.026-.032  
.050 BSC  
.150 BSC  
.860-.880  
.045-.055  
.095-.115  
.015-.020  
.165-.185  
.236-.260  
.570 REF.  
.670 REF.  
.190-.210  
.040-.060  
.040-.060  
.050  
E
A
+
O
D
E
F
7˚ TYP.  
1.27 BSC  
3.81 BSC  
21.84-22.35  
1.14-1.40  
2.41-2.92  
.38-.51  
G
P
Q
H
J
J
L
K
L
M
N
4.19-4.70  
5.99-6.60  
14.48 REF.  
17.02 REF.  
4.83-5.33  
1.02-1.52  
1.02-1.52  
1.27  
PIN 1  
PIN 1 & 7  
PIN 4  
O
P
S
T
F (Note 7)  
Q
G
M
R
R
H
S
T
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
1.27  
.050  
A1  
Notes:  
3.81  
A2  
.150  
1. Controlling dimensions are  
inches.  
2. Pin numbers start with Pin 1, and  
continue from left to right when  
viewed from the top.  
3. Dimensions shown do not include  
mold flash or other protrusions. Mold  
flash or protrusions shall not exceed  
.006 (.15 mm) on any side.  
4. Position of terminals to be  
measured at a position .25 (6.35 mm)  
below the package body.  
3.81  
.150  
1.27  
.050  
A5  
A7  
1.27  
.050  
A6  
5.08  
.200  
4.58 REF.  
.180 REF.  
A8  
PIN 1  
PIN 7  
5. All terminals are solder plated.  
6. Pins 2 and 6 omitted.  
7.  
.010 (.25) M  
A3  
A4  
MOUNTING HOLE PATTERN  
PI-2374-040799  
B
19  
8/99  
TNY256  
Date  
3/99  
Revision  
Notes  
-
A
B
1) TO-220-7B package information added.  
8/99  
2) ILUV minimum increased to 44µΑ to reflect production improvements.  
For the latest updates, visit our website: www.powerint.com  
Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability.  
Power Integrations does not assume any liability arising from the use of any device or circuit described herein, nor does it  
convey any license under its patent rights or the rights of others.  
PI Logo and TOPSwitch are registered trademarks of Power Integrations, Inc.  
©Copyright 1999, Power Integrations, Inc. 477 N. Mathilda Avenue, Sunnyvale, CA 94086  
WORLD HEADQUARTERS  
NORTH AMERICA - WEST  
Power Integrations, Inc.  
NORTH AMERICA - EAST  
& SOUTH AMERICA  
Power Integrations, Inc.  
EUROPE & AFRICA  
Power Integrations (Europe) Ltd.  
Centennial Court  
TAIWAN  
Power Integrations International  
Holdings, Inc.  
477 N. Mathilda Avenue  
Sunnyvale, CA 94086 USA  
Eastern Area Sales Office  
1343 Canton Road, Suite C1  
Marietta, GA 30066 USA  
Easthampstead Road  
Bracknell  
Berkshire RG12 1YQ,  
United Kingdom  
2F, #508, Chung Hsiao E. Rd., Sec. 5,  
Taipei 105, Taiwan  
Main:  
+1•408•523•9200  
Phone:  
Fax:  
+886•2•2727•1221  
+886•2•2727•1223  
Customer Service:  
Phone:  
Fax:  
+1•770•424•5152  
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Phone:  
Fax:  
+44•1344•462•300  
+44•1344•311•732  
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Holdings, Inc.  
Rm# 402, Handuk Building,  
649-4 Yeoksam-Dong, Kangnam-Gu,  
Seoul, Korea  
Phone:  
Fax:  
INDIA (Technical Support)  
Innovatech  
#1, 8th Main Road  
Vasanthnagar  
APPLICATIONS HOTLINE  
Power Integrations, K.K.  
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12-20 Shin-Yokohama 2-Chome,  
Kohoku-ku, Yokohama-shi,  
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World Wide  
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B
20  
8/99  
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