Additional Resources: Product Page
CUI Inc │ SERIES: VYB20W │ DESCRIPTION: DC-DC CONVERTER
date 08/29/2012 │ page 5 of 6
APPLICATION NOTES
1. Requirement on Output Load
In order to ensure the product operates efficiently and reliably, make sure the specified range of input voltage is not exceeded and the
minimum output load is not less than 10% load. If the actual load is less than the specified minimum load, the output ripple may
increase sharply while its efficiency and reliability will reduce greatly. If the actual output power is very small, please add an
appropriate resistor as extra loading.
2. Recommended Circuit
The VYB20W series has been tested according to the following recommended testing circuit. This series should be tested under load.
(see Figure 1)
Single Output
Dual Output
Vin
+V o
+Vo
0V
Vin
Cin
Cout
Cout
Cout
Figure 1
Cin
0V
DC
DC
DC DC
GND
GND
-Vo
If you want to further decrease the input/output ripple, you can increase capacitance properly or choose capacitors with low ESR. If
the capacitance is too big, a startup problem might arise. The maximum allowable capacitance to ensure safe and reliable operation is
listed in Table 1.
Single Vout
(Vdc)
Cout
(μF)
Cin
(μF)
Dual Vout
(Vdc)
Cout
(μF)
Cin
(μF)
3.3
5
470
470
220
220
100
100
100
100
100
100
--
±5
--
--
±220
±100
±100
--
100
100
100
--
Table 1
12
15
24
±12
±15
--
3. Trim Application and Trim Resistance (Single Output Models)
Formula for trim resistance
aR
2
Vref
Vo’-Vref
-R
3
up: R =
a=
a=
R
R
1
2
R
2
-a
Application circuit for TRIM(Part in broken line is the interior of models)
+Vo
+Vo
aR1
Vo’-Vref
Vref
down:
-R3
RT=
R1-a
R1
Note: Value for R1, R2, R3, and Vref refer to the following table.
RT: Trim resistance
a: User-defined parameter, no actual meaning.
Vo’: Trim up/down voltage.
RT
R1
R3
Vref
R2
Trim
R3
Vref
R2
Trim
RT
Vo
3.3 (Vdc)
5 (Vdc)
12 (Vdc) 15 (Vdc) 24 (Vdc)
Resistance
R1 (KΩ)
R2 (KΩ)
R3 (KΩ)
Vref (V)
0V
Trimdown
0V
Trimup
4.801
2.863
15
2.883
2.864
10
10.971
2.864
17.8
14.497
2.864
17.8
24.872
2.864
20
1.24
2.5
2.5
2.5
2.5
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