HYS64(72)V16300/32220GU
SDRAM-Modules
Notes:
1. These parameters depend on the cycle rate. These values are measured at 133 MHz for -7.5 and
at 100 Mhz for -8 modules. Input signals are changed once during tck, excepts for ICC6 and for
standby currents when tck=infinity. All values are shown per memory component.
2. These parameters are measured with continous data stream during read access and all DQ
toggling. CL=3 and BL=4 assumed and the VDDQ current is excluded.
3. All AC characteristics are shown on SDRAM component level.
An initial pause of 100µs is required after power-up, then a Precharge All Banks command must
be given followed by 8 Auto Refresh (CBR) cycles before the Mode Register Set Operation can
begin.
4. AC timing tests have V = 0.4 V and V = 2.4 V with the timing referenced to the 1.4 V crossover
il
ih
point. The transition time is measured between V and V . All AC measurements assume t =1ns
ih
il
T
with the AC output load circuit show. Specified tac and toh parameters are measured with a 50
pF only, without any resistive termination and with a input signal of 1V / ns edge rate between
0.8V and 2.0 V.
tCH
2.4 V
0.4 V
CLOCK
tT
tCL
tHOLD
tSETUP
INPUT
1.4 V
tAC
tAC
tLZ
tOH
I/O
50 pF
OUTPUT
1.4 V
tHZ
Measurement conditions for
tac and toh
SPT03404
5. If clock rising time is longer than 1ns, a time (t /2 -0.5) ns has to be added to this parameter.
T
6. Rated at 1.5 V
7. If t is longen than 1 ns, a time (t -1) ns has to be added to this parameter.
T
T
8. Anytime the refresh Period has been exceeded, a minimum of two Auto (CBR) Refresh
commands must be given to “wake-up“ the device.
9. Timing is asynchronous. if setup time is not met by rising edge of the clock then the CKE signal
is assumed latched on the next cycle.
10.Self Refresh Exit is a synchronous operation and begins on the 2nd positive clock edge after
CKE returns high. Self Refresh Exit is not complete until a time period equal to tRC is satisfied
once the Self Refresh Exit command is registered.
11.Referenced to the time which the output achieves the open circuit condition, not to output voltage
levels.
INFINEON Technologies
10
12.99
Powered by ICminer.com Electronic-Library Service CopyRight 2003
