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HYR1612830G-745

型号:

HYR1612830G-745

描述:

RAMBUS DRAM模块\n[ RAMBUS DRAM Module ]

品牌:

ETC[ ETC ]

页数:

14 页

PDF大小:

325 K

HYR 16xx30G/HYR 18xx20G  
Rambus RIMM Modules  
Direct RDRAM RIMM Modules  
(with 128/144 Mbit RDRAMs)  
Overview  
The Direct RambusRIMMmodule is a general purpose high-performance memory subsystem  
suitable for use in a broad range of applications including computer memory, personal computers,  
workstations, and other applications where high bandwidth and low latency are required.  
The Direct Rambus RIMM module consists of 128 MB/144 Mbit Direct Rambus DRAM (Direct  
RDRAM™) devices. These are extremely high-speed CMOS DRAMs organized as 8M words by 16  
or 18 bits. The use of Rambus Signaling Level (RSL) technology permits 600 MHz to 800 MHz  
transfer rates while using conventional system and board design technologies. Direct RDRAM  
devices are capable of sustained data transfers at 1.25 ns per two bytes (10 ns per sixteen bytes).  
The RDRAM architecture enables the highest sustained bandwidth for multiple, simultaneous,  
randomly addressed, memory transactions. The separate control and data buses with independent  
row and column control yield over 95% bus efficiency. The RDRAM's 32-bank architecture supports  
up to four simultaneous transactions per device.  
Form Factor  
The Rambus RIMM modules are offered in a 184-pad 1 mm edge connector pad pitch form factor  
suitable for 184 contact RIMM connectors. The RIMM module is suitable for desktop and other  
system applications. The next figure shows an eight device Rambus RIMM module without heat  
spreader.  
Features  
• High speed 800, 711 & 600 MHz RDRAM  
storage  
• Gold plated edge connector pad contacts  
• Serial Presence Detect (SPD) support  
• Operates from a 2.5 V supply (± 5%)  
• 184 edge connector pads with 1 mm pad  
spacing  
• Low power and powerdown self refresh  
modes  
• Maximum module PCB size:  
133.5 mm × 31.75 mm × 1.37 mm  
(5.25” × 1.25” × 0.05”)  
• Separate Row and Column buses for higher  
efficiency  
• Each RDRAM has 32 banks, for a total of  
,
512, 256 or 128 banks on each 256/288 MB,  
128/144MB or 64/72 MB module  
respectively.  
Fig.1 : Rambus RIMM module  
(without heat spreader)  
Data Book  
1
2.00  
HYR 16xx30G/HYR 18xx20G  
Rambus RIMM Modules  
Part Number Designators  
Organization Capacity I/O Frequency Part Designator  
[MHz]  
# of  
RDRAMs  
RDRAM  
Density  
64 MB/72 MB  
32 MB × 16  
32 MB × 16  
32 MB × 16  
32 MB × 16  
32 MB × 18  
32 MB × 18  
32 MB × 18  
32 MB × 18  
128 MB/144 MB  
64 MB × 16  
64 MB × 16  
64 MB × 16  
64 MB × 16  
64 MB × 18  
64 MB × 18  
64 MB × 18  
64 MB × 18  
256 MB/288 MB  
128 MB × 16  
128 MB × 16  
128 MB × 16  
128 MB × 16  
128 MB × 18  
128 MB × 18  
128 MB × 18  
128 MB × 18  
64 MB  
64 MB  
64 MB  
64 MB  
72 MB  
72 MB  
72 MB  
72 MB  
600  
711  
800  
800  
600  
711  
800  
800  
HYR163230G-653  
HYR163230G-745  
HYR163230G-845  
HYR163230G-840  
HYR183220G-653  
HYR183220G-745  
HYR183220G-845  
HYR183220G-840  
4
4
4
4
4
4
4
4
128 Mbit  
144 Mbit  
128 MB  
128 MB  
128 MB  
128 MB  
144 MB  
144 MB  
144 MB  
144 MB  
600  
711  
800  
800  
600  
711  
800  
800  
HYR166430G-653  
HYR166430G-745  
HYR166430G-845  
HYR166430G-840  
HYR186420G-653  
HYR186420G-745  
HYR186420G-845  
HYR186420G-840  
8
8
8
8
8
8
8
8
128 Mbit  
144 Mbit  
256 MB  
256 MB  
256 MB  
256 MB  
288 MB  
288 MB  
288 MB  
288 MB  
600  
711  
800  
800  
600  
711  
800  
800  
HYR1612830G-653  
HYR1612830G-745  
HYR1612830G-845  
HYR1612830G-840  
HYR1812820G-653  
HYR1812820G-745  
HYR1812820G-845  
HYR1812820G-840  
16  
16  
16  
16  
16  
16  
16  
16  
128 Mbit  
144 Mbit  
Data Book  
2
2.00  
HYR 16xx30G/HYR 18xx20G  
Rambus RIMM Modules  
Pin Configuration  
PIN  
A1  
Pin Name  
GND  
PIN  
B1  
Pin Name  
GND  
PIN  
A47  
A48  
A48  
A50  
Pin Name  
N.C.  
PIN  
B47  
B48  
B49  
B50  
B51  
B52  
B53  
Pin Name  
N.C.  
A2  
LDQA8  
GND  
B2  
LDQA7  
GND  
N.C.  
N.C.  
A3  
B3  
N.C.  
N.C.  
A4  
LDQA6  
GND  
B4  
LDQA5  
GND  
N.C.  
N.C.  
A5  
B5  
A51 VREF  
VREF  
A6  
LDQA4  
GND  
B6  
LDQA3  
GND  
A52  
A53  
GND  
SCL  
GND  
SA0  
A7  
B7  
A8  
LDQA2  
GND  
B8  
LDQA1  
GND  
A54 VDD  
B54 VDD  
A9  
B9  
A55  
A56  
A57  
SDA  
B55  
B56  
B57  
SA1  
SVdd  
SA2  
A10  
A11  
A12  
A13  
A14  
A15  
A16  
A17  
A18  
A19  
A20  
A21  
A22  
A23  
A24  
A25  
A26  
A27  
A28  
A29  
A30  
A31  
A32  
A33  
LDQA0  
GND  
B10  
B11  
B12  
B13  
B14  
B15  
B16  
B17  
B18  
B19  
B20  
B21  
B22  
B23  
B24  
B25  
B26  
B27  
B28  
B29  
B30  
B31  
B32  
B33  
LCFM  
GND  
SVdd  
SWP  
LCTMN  
GND  
LCFMN  
GND  
A58 VDD  
RSCK  
B58 VDD  
RCMD  
A59  
A60  
A61  
A62  
A63  
A64  
A65  
A66  
A67  
A68  
A69  
A70  
A71  
A72  
A73  
A74  
A75  
A76  
A77  
A78  
A79  
B59  
B60  
B61  
B62  
B63  
B64  
B65  
B66  
B67  
B68  
B69  
B70  
B71  
B72  
B73  
B74  
B75  
B76  
B77  
B78  
B79  
LCTM  
GND  
N.C.  
GND  
GND  
GND  
RDQB7  
GND  
RDQB8  
GND  
N.C.  
LROW2  
GND  
GND  
RDQB5  
GND  
RDQB6  
GND  
LROW1  
GND  
LROW0  
GND  
RDQB3  
GND  
RDQB4  
GND  
LCOL4  
GND  
LCOL3  
GND  
RDQB1  
GND  
RDQB2  
GND  
LCOL2  
GND  
LCOL1  
GND  
RCOL0  
GND  
RDQB0  
GND  
LCOL0  
GND  
LDQB0  
GND  
RCOL2  
GND  
RCOL1  
GND  
LDQB1  
GND  
LDQB2  
GND  
RCOL4  
GND  
RCOL3  
GND  
LDQB3  
GND  
LDQB4  
GND  
RROW1  
GND  
RROW0  
GND  
LDQB5  
GND  
LDQB6  
GND  
N.C.  
RROW2  
GND  
LDQB7  
GND  
LDQB8  
GND  
GND  
RCTM  
N.C.  
Data Book  
3
2.00  
HYR 16xx30G/HYR 18xx20G  
Rambus RIMM Modules  
Pin Configuration (cont’d)  
PIN  
Pin Name  
PIN  
Pin Name  
PIN  
A80  
A81  
A82  
A83  
A84  
A85  
A86  
A87  
A88  
A89  
A90  
A91  
A92  
Pin Name  
GND  
PIN  
B80  
B81  
B82  
B83  
B84  
B85  
B86  
B87  
B88  
B89  
B90  
B91  
B92  
Pin Name  
GND  
A34  
LSCK  
B34  
LCMD  
A35 VCMOS  
A36 SOUT  
A37 VCMOS  
B35 VCMOS  
B36 SIN  
B37 VCMOS  
RCTMN  
GND  
RCFMN  
GND  
RDQA0  
GND  
RCFM  
GND  
A38  
A39  
A40  
N.C.  
GND  
N.C.  
B38  
B39  
B40  
N.C.  
GND  
N.C.  
RDQA2  
GND  
RDQA1  
GND  
A41 VDD  
A42 VDD  
B41 VDD  
B42 VDD  
RDQA4  
GND  
RDQA3  
GND  
A43  
A44  
A45  
A46  
N.C.  
N.C.  
N.C.  
N.C.  
B43  
B44  
B45  
B46  
N.C.  
N.C.  
N.C.  
N.C.  
RDQA6  
GND  
RDQA5  
GND  
RDQA8  
GND  
RDQA7  
GND  
Data Book  
4
2.00  
HYR 16xx30G/HYR 18xx20G  
Rambus RIMM Modules  
Module Connector Pad Description  
Signal  
Module Connector Pads I/O  
Type  
Description  
GND  
A1, A3, A5, A7, A9, A11,  
A13, A15, A17, A19, A21,  
A23, A25, A27, A29, A31,  
A33, A39, A52, A60, A62,  
A64, A66, A68, A70, A72,  
A74, A76, A78, A80, A82,  
A84, A86, A88, A90, A92,  
B1, B3, B5, B7, B9, B11,  
B13, B15, B17, B19, B21,  
B23, B25, B27, B29, B31,  
B33, B39, B52, B60, B62,  
B64, B66, B68, B70, B72,  
B74, B76, B78, B80, B82,  
B84, B86, B88, B90, B92  
Ground reference for RDRAM core  
and interface. 72 PCB connector  
pads.  
LCFM  
B10  
I
RSL  
RSL  
VCMOS  
RSL  
RSL  
RSL  
RSL  
Clock from master. Interface clock  
used for receiving RSL signals from  
the Channel. Positive polarity.  
LCFMN  
LCMD  
B12  
I
Clock from master. Interface clock  
used for receiving RSL signals from  
the Channel. Negative polarity.  
B34  
I
Serial Command used to read from  
and write to the control registers.  
Also used for power management.  
LCOL4 …  
LCOL0  
A20, B20, A22, B22, A24  
I
Column bus. 5-bit bus containing  
control and address information for  
column accesses.  
LCTM  
A14  
A12  
I
Clock to master. Interface clock  
used for transmitting RSL signals to  
the Channel. Positive polarity.  
LCTMN  
I
Clock to master. Interface clock  
used for transmitting RSL signals to  
the Channel. Negative polarity.  
LDQA8 …  
LDQA0  
A2, B2, A4, B4, A6, B6,  
A8, B8, A10  
I/O  
Data bus A. A 9-bit bus carrying a  
byte of read or write data between  
the Channel and the RDRAM.  
LDQA8 is non-functional on  
modules with x16 RDRAM devices.  
Data Book  
5
2.00  
HYR 16xx30G/HYR 18xx20G  
Rambus RIMM Modules  
Module Connector Pad Description (cont’d)  
Signal  
Module Connector Pads I/O  
Type  
Description  
LDQB8 …  
LDQB0  
B32, A32, B30, A30, B28, I/O  
A28, B26, A26, B24  
RSL  
Data bus B. A 9-bit bus carrying a  
byte of read or write data between  
the Channel and the RDRAM.  
LDQB8 is non-functional on  
modules with x16 RDRAM devices.  
LROW2 …  
LROW0  
B16, A18, B18  
A34  
I
RSL  
VCMOS  
Row bus. 3-bit bus containing  
control and address information for  
row accesses.  
LSCK  
N.C.  
I
Serial Clock input. Clock source  
used to read from and write to the  
RDRAM control registers.  
A16, B14, A38, B38, A40,  
B40, A77, B79;A43, B43,  
A44, B44, A45, B45, A46,  
B46, A47, B47, A48, B48,  
A49, B49, A50, B50  
These pads are not connected.  
These connector pads are reserved  
for future use.  
RCFM  
RCFMN  
RCMD  
B83  
B81  
B59  
I
I
I
RSL  
Clock from master. Interface clock  
used for receiving RSL signals from  
the Channel. Positive polarity.  
RSL  
Clock from master. Interface clock  
used for receiving RSL signals from  
the Channel. Negative polarity.  
VCMOS  
Serial Command Input used to read  
from and write to the control  
registers. Also used for power  
management.  
RCOL4 …  
RCOL0  
A73, B73, A71, B71, A69  
I
I
I
RSL  
RSL  
RSL  
RSL  
Column bus. 5-bit bus containing  
control and address information for  
column accesses.  
RCTM  
A79  
A81  
Clock to master. Interface clock  
used for transmitting RSL signals to  
the Channel. Positive polarity.  
RCTMN  
Clock to master. Interface clock  
used for transmitting RSL signals to  
the Channel. Negative polarity.  
RDQA8 …  
RDQA0  
A91, B91, A89, B89, A87, I/O  
B87, A85, B85, A83  
Data bus A. A 9-bit bus carrying a  
byte of read or write data between  
the Channel and the RDRAM.  
RDQA8 is non-functional on  
modules with x16 RDRAM devices.  
Data Book  
6
2.00  
HYR 16xx30G/HYR 18xx20G  
Rambus RIMM Modules  
Module Connector Pad Description (cont’d)  
Signal  
Module Connector Pads I/O  
Type  
Description  
RDQB8 …  
RDQB0  
B61, A61, B63, A63, B65, I/O  
A65, B67, A67, B69  
RSL  
Data bus B. A 9-bit bus carrying a  
byte of read or write data between  
the Channel and the RDRAM.  
RDQB8 is non-functional on  
modules with x16 RDRAM devices.  
RROW2 …  
RROW0  
B77, A75, B75  
A59  
I
I
RSL  
Row bus. 3-bit bus containing  
control and address information for  
row accesses.  
RSCK  
VCMOS  
Serial Clock input. Clock source  
used to read from and write to the  
RDRAM control registers.  
SA0  
SA1  
SA2  
SCL  
SDA  
B53  
B55  
B57  
A53  
A55  
I
SVDD  
SVDD  
SVDD  
SVDD  
SVDD  
Serial Presence Detect Address 0.  
Serial Presence Detect Address 1.  
Serial Presence Detect Address 2.  
Serial Presence Detect Clock.  
I
I
I
I/O  
Serial Presence Detect Data (Open  
Collector I/O).  
SIN  
B36  
I/O  
I/O  
VCMOS  
Serial I/O for reading from and  
writing to the control registers.  
Attaches to SIO0 of the first RDRAM  
on the module.  
SOUT  
A36  
VCMOS  
Serial I/O for reading from and  
writing to the control registers.  
Attaches to SIO1 of the last RDRAM  
on the module.  
SVDD  
SWP  
A56, B56  
A57  
I
SPD Voltage. Used for signals SCL,  
SDA, SWE, SA0, SA1 and SA2.  
SVDD  
Serial Presence Detect Write  
Protect (active high). When low, the  
SPD can be written as well as read.  
VCMOS  
VDD  
A35, B35, A37, B37  
CMOS I/O Voltage. Used for signals  
CMD, SCK, SIN, SOUT.  
A41, A42, A54, A58, B41,  
B42, B54, B58  
Supply voltage for the RDRAM core  
and interface logic.  
VREF  
A51, B51  
Logic threshold reference voltage  
for RSL signals.  
Data Book  
7
2.00  
DQA8  
DQA7  
DQA6  
DQA5  
DQA4  
DQA3  
DQA2  
DQA1  
DQA0  
CFM  
DQA8  
DQA7  
DQA6  
DQA5  
DQA4  
DQA3  
DQA2  
DQA1  
DQA0  
CFM  
DQA8  
DQA7  
DQA6  
DQA5  
DQA4  
DQA3  
DQA2  
DQA1  
DQA0  
CFM  
LDQA8  
LDQA7  
LDQA6  
LDQA5  
LDQA4  
LDQA3  
LDQA2  
LDQA1  
LDQA0  
LCFM  
DQA8  
DQA7  
DQA6  
DQA5  
DQA4  
DQA3  
DQA2  
DQA1  
DQA0  
CFM  
RDQA8  
RDQA7  
RDQA6  
RDQA5  
RDQA4  
RDQA3  
RDQA2  
RDQA1  
RDQA0  
RCFM  
CFMN  
CTM  
CFMN  
CTM  
CFMN  
CTM  
LCFMN  
LCTM  
CFMN  
CTM  
RCFMN  
RCTM  
CTMN  
ROW2  
ROW1  
ROW0  
COL4  
COL3  
COL2  
COL1  
COL0  
DQB0  
DQB1  
DQB2  
DQB3  
DQB4  
DQB5  
DQB6  
DQB7  
DQB8  
CTMN  
ROW2  
ROW1  
ROW0  
COL4  
COL3  
COL2  
COL1  
COL0  
DQB0  
DQB1  
DQB2  
DQB3  
DQB4  
DQB5  
DQB6  
DQB7  
DQB8  
CTMN  
ROW2  
ROW1  
ROW0  
COL4  
COL3  
COL2  
COL1  
COL0  
DQB0  
DQB1  
DQB2  
DQB3  
DQB4  
DQB5  
DQB6  
DQB7  
DQB8  
LCTMN  
LROW2  
LROW1  
LROW0  
LCOL4  
LCOL3  
LCOL2  
LCOL1  
LCOL0  
LDQB0  
LDQB1  
LDQB2  
LDQB3  
LDQB4  
LDQB5  
LDQB6  
LDQB7  
LDQB8  
CTMN  
ROW2  
ROW1  
ROW0  
COL4  
COL3  
COL2  
COL1  
COL0  
DQB0  
DQB1  
DQB2  
DQB3  
DQB4  
DQB5  
DQB6  
DQB7  
DQB8  
RCTMN  
RROW2  
RROW1  
RROW0  
RCOL4  
RCOL3  
RCOL2  
RCOL1  
RCOL0  
RDQB0  
RDQB1  
RDQB2  
RDQB3  
RDQB4  
RDQB5  
RDQB6  
RDQB7  
RDQB8  
SIN  
LSCK  
LCMD  
VREF  
SOUT  
RSCK  
RCMD  
HYR 16xx30G/HYR 18xx20G  
Rambus RIMM Modules  
Absolute Maximum Ratings  
Symbol Parameter  
Limit Values  
min. max.  
Unit  
VI,ABS  
Voltage applied to any RSL or CMOS signal pad with  
respect to GND  
– 0.3  
V
DD + 0.3  
V
VDD,ABS Voltage on VDD with respect to GND  
TSTORE Storage temperature  
– 0.5  
– 50  
V
DD + 1.0  
V
100  
°C  
DC Recommended Electrical Conditions  
Symbol Parameter and Conditions  
Limit Values  
max.  
Unit  
min.  
VDD  
Supply voltage  
2.50 – 0.13  
2.50 + 0.13  
V
V
VCMOS  
CMOS I/O power supply at pad for  
2.5 V controllers:  
2.5 – 0.13  
2.5 + 0.25  
CMOS I/O power supply at pad for  
1.8 V controllers:  
1.8 – 0.1  
1.4 – 0.2  
1.8 + 0.2  
1.4 + 0.2  
V
V
V
V
V
V
V
VREF  
VIL  
Reference voltage  
RSL input low voltage  
RSL input high voltage  
V
V
REF – 0.5  
REF + 0.2  
V
V
REF – 0.2  
REF + 0.5  
VIH  
VIL,CMOS CMOS input low voltage  
VIH,CMOS CMOS input high voltage  
VOL,CMOS CMOS output low voltage @  
– 0.3  
0.5 VCMOS + 0.25 VCMOS + 0.7  
0.5 VCMOS – 0.25  
0.3  
I
OL,CMOS = 1 mA  
VOH,CMOS CMOS output high voltage @  
OH,CMOS = – 0.25 mA  
REF current @ VREF,MAX  
V
CMOS – 0.3  
V
I
IREF  
V
– 10 × no.  
10 × no.  
µA  
µA  
µA  
RDRAMs1)  
RDRAMs1)  
ISCK,CMD CMOS input leakage current @  
(0 VCMOS VDD)  
– 10 × no.  
10 × no.  
RDRAMs1)  
RDRAMs1)  
ISIN,SOUT CMOS input leakage current @  
(0 VCMOS VDD)  
– 10.0  
10.0  
1) The table below shows the number of 128 Mbit RDRAM devices contained in a RIMM module of  
listed memory storage capacity.  
RIMM Module Capacity  
64/72 MB  
128/144 MB 256/288 MB  
16  
Number of 128/144 Mbit RDRAM devices 4  
8
Data Book  
9
2.00  
HYR 16xx30G/HYR 18xx20G  
Rambus RIMM Modules  
AC Electrical Specifications  
Symbol  
Parameter and Conditions  
Limit Values  
Unit  
min.  
25.2  
typ.  
28  
max.  
Z
Module Impedance  
30.8  
TPD  
Average clock delay from finger of all RSL clock  
nets (CTM, CTMN, CFM and CFMN)  
See  
ns  
Table1)  
TPD  
Propagation delay variation of RSL signals with  
respect to TPD2)3 ) for 4 and 8 device modules  
– 21  
– 24  
– 100  
21  
ps  
ps  
ps  
%
%
%
Propagation delay variation of RSL signals with  
respect to TPD2)3 ) for 16 device modules  
24  
TPD-CMOS Propagation delay variation of SCK and CMD  
100  
signals with respect to an average clock delay2)  
VA/VIN  
Attenuation Limit  
See  
Table1)  
VXF/VIN  
VXB/VIN  
Forward crosstalk coefficient  
(300 ps input rise time @ 20%-80%)  
See  
Table1)  
Backward crosstalk coefficient  
(300 ps input rise time @ 20%-80%)  
See  
Table1)  
1) Table below lists parameters and specifications for different storage capacity RIMM Modules that use 128 Mbit  
or 144 MBbit RDRAM devices.  
2) Average clock delay is defined as the average delay from finger to finger of all RSL clock nets (CTM, CTMN,  
.....CFM and CFMN).  
3.) If the RIMM module meets the folowwing specifications, then it is compliant to the specification. If the RIMM  
.....module does not meet these specifications, then the specification can be adjusted by the “Adjusted TPD  
-
.....Specification” table.  
Adjusted TPD Specfication  
Absolute  
Min /Max  
Symbol  
Parameter and Conditions  
Adjusted Min/Max  
Unit  
ps  
Propagation delay variation of RSL signals  
with respect to TPD for 4 and 8 device modules  
+/-[17+(18*N*Z0)]a  
+/-[24+(18*N*Z0)]  
-30  
30  
50  
TPD  
Propagation delay variation of RSL signals  
with respect to TPD for 16 device modules  
-50  
ps  
a) Where:  
N = Nuber of RDRAM devices installed on the RIMm module  
DZ0 = delta Z0% =(max Z0 - minZ0)/(min Z0)  
(max Z= and min Z0 are obtained from the loaded (high impedance) impedance coupons of all RSL layers on the  
modules)  
Data Book  
10  
2.00  
HYR 16xx30G/HYR 18xx20G  
Rambus RIMM Modules  
AC Electrical Specifications for RIMM Modules  
Symbol RIMM Module Capacity:  
No. of 128/144 Mbit RDRAMs:  
Unit  
Parameter and Conditions for -800, 711& -600 max. max. max.  
RIMM Modules  
TPD  
Propagation Delay, all RSL signals -800, -711  
Propagation Delay, all RSL signals -600  
Attenuation Limit -800, -711  
1.25 1.50 2.06 ns  
1.25 1.60 2.10 ns  
VA/VIN  
12  
8
16  
10  
4
25  
21  
8
%
%
%
Attenuation Limit -600  
VXF/VIN Forward crosstalk coefficient (300 ps input rise  
2
time @ 20% - 80%) -800, -711, -600  
VXB/VIN Backward crosstalk coefficient (300 ps input rise 1.5  
2.0  
0.8  
2.5  
1.2  
%
time @ 20%-80%) -800, -711, -600  
RDC  
DC Resistance Limit -800, -711, -600  
0.6  
Data Book  
11  
2.00  
HYR 16xx30G/HYR 18xx20G  
Rambus RIMM Modules  
RIMM Module Current Profile  
IDD RIMM Module Capacity:  
Unit  
No. of 128/144 Mbit RDRAMs:  
RIMM Modules Power  
Conditionsa)  
IDD1 One RDRAM in Readb,  
Freq. max.  
530/585  
max.  
max.  
-800  
-711  
-600  
-800  
-711  
-600  
-800  
-711  
-600  
-800  
-711  
-600  
-800  
-711  
-600  
-800  
-711  
-600  
545/600  
495/545  
435/475  
580/635  
530/580  
470/510  
mA  
mA  
mA  
balance in NAP mode  
480/530  
420/460  
820/875  
755/805  
680/720  
IDD2 One RDRAM in Readb,  
1220/1275 2020/2075 mA  
1135/1185 1895/1945 mA  
1040/1080 1760/1800 mA  
balance in Standby mode  
IDD3 One RDRAM in Readb,  
970/1025 1570/1625 2770/2825 mA  
balance in Active mode  
905/955  
830/870  
585/645  
525/580  
460/505  
875/935  
800/855  
720/765  
1485/1535 2645/2695 mA  
1390/1430 2510/2550 mA  
IDD4 One RDRAM in Write,  
600/660  
540/595  
475/520  
635/695  
575/630  
510/555  
mA  
mA  
mA  
balance in Active mode  
IDD5 One RDRAM in Write,  
1275/1335 2075/2135 mA  
1180/1235 1940/1995 mA  
1080/1125 1800/1845 mA  
balance in Standby mode  
IDD6 One RDRAM in Write,  
1025/1085 1625/1685 2825/2885 mA  
950/1005 1530/1585 2690/2745 mA  
balance in Active mode  
870/915  
1430/1475 2550/2595 mA  
a) Actual power will depend on individual memory controller and usage pattern. Power does not include Refresh  
Current.  
b) I/O power is a function of % 1’s to add I/O power for 50% 1’s for a x 16 need to add 257mA or 290mA for x18  
ECC module for the following: VDD = 2.5V, VTERM = 1.8V, VREF = 1.4V and VDIL = VREF = 0.5V.  
Data Book  
12  
2.00  
HYR 16xx30G/HYR 18xx20G  
Rambus RIMM Modules  
The following defines the RIMM module dimensions. All units are in millimeters.  
Fig.2 : RIMM Module PCB Physical Description  
RIMM Module PCB Physical Description  
Dimension Description  
Limit Values  
nom. max.  
133.20 133.35 133.50 mm  
Unit  
min.  
A
B
C
D
E
F
PCB length  
PCB height  
5.244  
5.250  
5.256  
in  
31.75  
1.25  
mm  
in  
Center-center pad width from pad A1 to A46, A47 –  
to A92, B1 to B46 or B47 to B92  
45.00  
1.770  
mm  
in  
Spacing from PCB left edge to connector key  
notch  
55.10  
2.169  
55.175 55.25  
mm  
in  
2.172  
2.175  
Spacing from contact pad PCB edge to side edge –  
retainer notch  
17.78  
0.700  
mm  
in  
PCB thickness  
1.17  
0.046  
1.27  
0.050  
1.37  
0.054  
mm  
in  
G
Heat spreader thickness from PCB surface (one  
side) to heat spreader top surface  
3.02  
0.119  
mm  
in  
Data Book  
13  
2.00  
HYR 16xx30G/HYR 18xx20G  
Rambus RIMM Modules  
Standard RIMM Module Marking  
The RIMM modules available from INFINEON Technoligies will be marked per Figure 3 below. This  
marking will help OEMs and users identify the Rambus RIMM modules when used in specific  
system applications. This will assist OEMs or users to specify and correctly verify if the correct  
RIMM modules are installed in their systems. In the diagram, a label is shown attached to the RIMM  
module’s heat spreader.  
A
B
C
F
G
D
E
Fig.3 Standard RIMM Module Marking  
Standard RIMM Module Marking  
Label Field  
Description  
Marked Text  
Unit  
A
B
C
Module Memory  
Capacity  
Number of 8-bit or 9-bit MBytes of  
RDRAM storage in RIMM module  
256MB, 128MB,  
64MB  
MB  
Number of RDRAMs Number of RDRAM devices contained 16, 8, 4  
in the RIMM module  
RDRAM  
devices  
ECC Support  
Indicates whether the RIMM module  
blank = 8-bit Byte  
supports 8-bit (no ECC) or 9-bit (ECC) ECC = 9-bit Byte  
Bytes  
D
Memory Speed  
Data transfer speed for RDRAM RIMM 800, 711, 600  
module  
MHz  
ns  
E
F
tRAC  
Row Access Time  
-45, -53  
Part Number  
INFINEON part number  
G Manufacturing Code Date Code etc.  
Data Book  
14  
2.00  
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