™
HyperPHY Transceiver Core
For more information please call:
The modular HyperPHY methodology allows for a single PLL to support 4
up to 64 TX and/or RX cores, with practically any combination of RX and TX.
Up to 128 full duplex channels can be placed on a single ASIC using this
methodology.
LSI Logic Corporation
North American Headquarters
Milpitas, CA
Although TX and RX cores are physically separate, each channel can
perform a built-in-self-test (BIST) using a PRBS pattern in a serial loopback
mode.The TX LVDS drivers have programmable output levels allowing the user
to “tune” the driver for specific transmission channels.
Tel: 866 574 5741
LSI Logic Europe Ltd.
European Headquarters
United Kingdom
Tel: 44 1344 426544
Fax: 44 1344 481039
Gflx S T A N D A R D H Y P E R P H Y A P P L I C A T I O N S
A common application for HyperPHY is the high-speed switch used in
broadband networking and in local area networks. Thus, it includes routers,
LAN switches, ATM switches, digital cross-connects, ADMs, and DWDM
systems. A typical scenario is shown in Figure 2 for a SONET or DWDM
system, where a switch card with a switch matrix ASIC communicates with a
number of line cards.
LSI Logic KK Headquarters
Tokyo, Japan
Tel: 81 3 5463 7165
Fax 81 3 5463 7820
LSI: Logic web site:
www.lsilogic.com
Packet Transfer
High Speed
Optical SERDES
Interface (SFI)
Interface (SPI) Backplane Interface
O/E
O/E
SERDES
SERDES
LSI Logic logo design, CoreWare, HyperPHY and
Gflx are trademarks or registered trademarks of
LSI Logic Corporation. All other brand and prod-
uct names may be trademarks of their respective
companies.
Link
Layer
Traffic Processing
Optics
Optics
PHY
Line Card
LSI Logic Corporation reserves the right to make
changes to any products and services herein at
any time without notice. LSI Logic does not assume
any responsibility or liability arising out of the
application or use of any product or service
described herein, except as expressly agreed to in
writing by LSI Logic; nor does the purchase, lease,
or use of a product or service from LSI Logic con-
vey a license under any patent rights, copyrights,
trademark rights, or any other of the intellectual
property rights of LSI Logic or of third parties.
O/E
O/E
SERDES
SERDES
Link
PHY
Switch Fabric
Layer
Traffic Processing
Line Card
High Speed
Backplane
Figure 2: HyperPHY in a DWDM/SONET System Architecture
Copyright ©2002 by LSI Logic Corporation.
All rights reserved.
HyperPHY channels can be used as the serial backplane interface
between line cards. Gflx Standard HyperPHY allows up to 128 full duplex
channels on an ASIC, so a single switch fabric ASIC can have a total
throughput of 159 Gbps, assuming 622 Mbps per channel. Since widely-used
industry standard specifications for backplane interfaces do not exist, the
modularity and flexibility of HyperPHY transceivers makes them suitable for
nearly all applications.
Order No.C20050
502.0k.SR.W - Printed in USA
At the line card interface to the optics, Gflx Standard HyperPHY is well
suited to comply with both the 10 Gbps SFI-4 specification.
For interfacing between Traffic Processing ASICs and ASSPs such as
framers, Gflx Standard HyperPHY also complies with the 10 Gbps SPI-4.2
specification.
Gflx Standard HyperPHY receivers have lane-to-lane de-skew capabilities
to meet the requirements of SPI-4.2.
