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CYM1841AP6-15C

型号:

CYM1841AP6-15C

品牌:

CYPRESS[ CYPRESS ]

页数:

14 页

PDF大小:

198 K

CYM1841A  
CYM1841B  
CYM1841C  
256K x 32 Static RAM Module  
Reading or writing can be executed on individual bytes or any  
combination of multiple bytes through proper use of selects.  
Features  
• High-density 8-megabit SRAM module  
Writing to each byte is accomplished when the appropriate  
Chip Select (CS) and Write Enable (WE) inputs are both LOW.  
Data on the Input/Output pins (I/O) is written into the memory  
• 32-bit standard footprint supports densities from 16K  
x 32 through 1M x 32  
location specified on the address pins (A through A ).  
0
17  
• High-speed CMOS SRAMs  
— Access time of 12 ns  
Reading the device is accomplished by taking the Chip Select  
(CS) LOW while Write Enable (WE) remains HIGH. Under  
these conditions, the contents of the memory location speci-  
fied on the address pins will appear on the data Input/Output  
pins (I/O).  
• Low active power  
— 5.3W (max.) at 25 ns  
• SMD technology  
The data input/output pins stay at the high-impedance state  
when write enable is LOW or the appropriate chip selects are  
HIGH.  
• TTL-compatible inputs and outputs  
• Low profile  
Two pins (PD and PD ) are used to identify module memory  
0
1
— Max. height of 0.58 in.  
• Available in ZIP, SIMM, and angled SIMM footprint  
density in applications where alternate versions of the JE-  
DEC-standard modules can be interchanged.  
• 72-pin SIMM version compatible with 1M x 32  
(CYM1851)  
The CYM1841A, CYM1841B, and CYM1841C are 100% pin,  
package, and electrically identical. The CYM1841A utilizes  
corner power and ground SRAMs, the CYM1841B utilizes  
256K x 16 SRAMs, the CYM1841C utilizes center power and  
ground SRAMs.  
Functional Description  
The CYM1841A/B/C are high-performance 8-megabit static  
RAM modules organized as 256K words by 32 bits. This mod-  
ule is constructed from eight 256K x 4 SRAMs (1841A/C) or  
256K x 16 SRAMs (1841B) in SOJ packages mounted on an  
epoxy laminate board with pins. Four chip selects (CS , CS ,  
A 72-pin SIMM is offered for compatibility with the 1M x 32  
CYM1851. This version is socket upgradable to the CYM1851.  
Both the 64-pin and 72-pin SIMM modules are available with  
either tin-lead or 10 micro-inches of gold flash on the edge  
contacts.  
1
2
CS , CS ) are used to independently enable the four bytes.  
3
4
Logic Block Diagram  
PD – GND  
0
PD – GND  
PD – OPEN (72-pin only)  
2
1
A A  
0
17  
18  
PD – OPEN (72-pin only)  
3
OE  
WE  
256K x 4  
SRAM  
256K x 4  
SRAM  
I/O – I/O  
I/O – I/O  
4 7  
0
3
4
4
4
4
4
4
4
4
CS  
1
256K x 4  
SRAM  
256K x 4  
SRAM  
I/O – I/O  
I/O – I/O  
12  
8
11  
15  
23  
31  
CS  
CS  
CS  
2
3
4
256K x 4  
SRAM  
256K x 4  
SRAM  
I/O – I/O  
16  
I/O –I/O  
20  
19  
256K x 4  
SRAM  
256K x 4  
SRAM  
I/O –I/O  
28  
I/O – I/O  
24  
27  
1841A–1  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose  
CA 95134  
408-943-2600  
June 13, 2000  
CYM1841A  
CYM1841B  
CYM1841C  
Logic Block Diagram (1841B)  
PD GND  
0
PD GND  
1
A A  
PD OPEN (72-pin only)  
0
17  
2
18  
PD OPEN (72-pin only)  
3
OE  
WE  
CS  
1
CS  
CS  
2
3
CS  
4
I/O I/O  
16  
23  
8
8
256K x 16  
SRAM  
I/O I/O  
24  
31  
I/O I/O  
0
7
8
8
256K x 16  
SRAM  
I/O I/O  
8
15  
1841A1  
Selection Guide  
1841C-12 1841B/C-15 1841A/B/C-20 1841A/B/C-25 1841A/B/C-35 1841A/B/C-45  
Maximum Access Time (ns)  
12  
15  
20  
25  
35  
45  
Maximum Operating  
Current (mA)  
1600  
1600  
1120  
960  
960  
960  
Maximum Standby  
Current (mA)  
480  
480  
480  
480  
480  
480  
Shaded areas contain preliminary information.  
2
CYM1841A  
CYM1841B  
CYM1841C  
Pin Configurations  
72-Pin  
SIMM  
Top View  
64-Pin  
ZIP/SIMM  
Top View  
NC  
PD  
1
NC  
PD  
2
3
2
3
4
5
GND  
1
I/O  
8
1
3
GND  
PD  
PD  
2
6
0
0
PD  
7
PD  
1
I/O  
I/O  
I/O  
I/O  
V
4
5
I/O  
I/O  
I/O  
8
9
0
1
2
3
0
1
2
I/O  
8
6
10  
7
I/O  
I/O  
10  
11  
12  
13  
I/O  
9
9
8
9
I/O  
10  
10  
I/O  
V
14  
3
CC  
A
11  
12  
13  
15  
16  
17  
I/O  
I/O  
15  
16  
17  
19  
20  
21  
11  
11  
CC  
A
0
A
0
14  
A
18  
7
A
1
7
A
1
A
8
A
8
A
2
A
2
A
18  
A
22  
9
9
19  
20  
21  
23  
24  
25  
27  
28  
29  
I/O  
I/O  
23  
24  
25  
27  
28  
29  
31  
32  
33  
12  
12  
I/O  
I/O  
4
5
6
7
4
5
6
I/O  
13  
I/O  
13  
I/O  
I/O  
I/O  
I/O  
I/O  
22  
26  
I/O  
I/O  
14  
14  
I/O  
15  
I/O  
15  
26  
I/O  
30  
7
GND  
GND  
WE  
WE  
A
15  
2
A
15  
A
14  
A
30  
14  
1
34  
CS  
31  
35  
CS  
CS  
1
CS  
2
32  
33  
36  
37  
CS  
A
CS  
4
4
17  
CS  
3
CS  
3
34  
38  
39  
A
17  
35  
A
16  
A
36  
37  
40  
41  
16  
OE  
OE  
GND  
GND  
38  
42  
I/O  
39  
I/O  
43  
24  
24  
I/O  
40  
41  
I/O  
16  
44  
45  
16  
I/O  
I/O  
I/O  
I/O  
25  
25  
26  
27  
I/O  
17  
I/O  
42  
43  
46  
17  
I/O  
47  
26  
I/O  
I/O  
18  
44  
48  
49  
18  
45  
I/O  
27  
I/O  
19  
46  
47  
I/O  
50  
19  
A
A
51  
3
3
A
48  
A
10  
52  
53  
10  
49  
A
4
A
4
50  
51  
A
A
54  
55  
11  
A
11  
A
5
A
5
A
52  
53  
56  
12  
A
12  
V
V
57  
CC  
CC  
54  
58  
59  
13  
A
13  
A
55  
A
6
6
I/O  
56  
57  
60  
61  
I/O  
I/O  
I/O  
I/O  
20  
20  
21  
22  
23  
I/O  
I/O  
I/O  
I/O  
I/O  
28  
28  
29  
30  
31  
I/O  
21  
58  
59  
62  
63  
I/O  
29  
I/O  
60  
64  
65  
22  
61  
I/O  
30  
62  
63  
I/O  
23  
66  
67  
I/O  
31  
GND  
64  
68  
69  
GND  
A
18  
A
19  
1841A3  
70  
71  
NC  
1841A2  
NC  
72  
3
CYM1841A  
CYM1841B  
CYM1841C  
DC Voltage Applied to Outputs  
in High Z State  
Maximum Ratings  
..................................................... –  
0.5V to +7.0V  
0.5V to +7.0V  
(Above which the useful life may be impaired. For user guide-  
lines, not tested.)  
................................................. –  
DC Input Voltage  
..................................... –  
Storage Temperature  
55°C to +125°C  
Operating Range  
Ambient Temperature with  
Power Applied  
Ambient  
Temperature  
.................................................... –  
10°C to +85°C  
Range  
V
CC  
..................–  
Supply Voltage to Ground Potential  
0.5V to +7.0V  
Commercial  
0°C to +70°C  
5V ± 10%  
Electrical Characteristics Over the Operating Range  
1841C-12  
1841B/C-15  
1841A/B/C  
-20  
1841A/B/C  
-25, 35, 45  
Parame-  
ter  
Description  
Test Conditions  
= Min., I = 4.0 mA  
Min.  
Max.  
Min. Max.  
Min.  
Max.  
Unit  
V
Output HIGH  
Voltage  
V
V
2.4  
2.4  
2.4  
V
OH  
CC  
CC  
OH  
V
Output LOW  
Voltage  
= Min., I = 8.0 mA  
0.4  
0.4  
0.4  
V
V
OL  
OL  
V
V
Input HIGH  
Voltage  
2.2  
0.5  
16  
10  
V
2.2  
0.5  
16  
10  
V
2.2  
0.5  
16  
10  
V
CC  
IH  
IL  
CC  
CC  
Input LOW  
Voltage  
0.8  
+16  
+10  
1600  
0.8  
+16  
+10  
1120  
0.8  
+16  
+10  
960  
V
I
I
I
Input Leak-  
age Current  
GND < V < V  
CC  
mA  
mA  
mA  
IX  
I
Output Leak- GND < V < V ,  
CC  
age Current  
OZ  
CC  
O
Output Disabled  
= Max., I = 0 mA,  
OUT  
V
Operat-  
V
CC  
CC  
ing  
CS < V  
IL  
Supply Cur-  
rent  
I
I
Automatic CS Max. V , CS > V ,  
480  
240  
480  
200  
480  
200  
mA  
mA  
SB1  
CC  
IH  
Power-Down Min. Duty Cycle = 100%  
[1]  
Current  
Automatic CS Max. V , CS > V  
-
CC  
SB2  
CC  
Power-Down 0.2V,  
[1]  
Current  
V
> V 0.2V,  
IN CC  
or V < 0.2V  
IN  
Capacitance[2]  
Parameter  
Description  
Test Conditions  
T = 25°C, f = 1 MHz,  
Max.  
Unit  
[3]  
C
C
Input Capacitance  
70/20  
20  
pF  
pF  
IN  
A
V
= 5.0V  
CC  
Output Capacitance  
OUT  
Notes:  
1. A pull-up resistor to VCC on the CS input is required to keep the device deselected during VCC power-up, otherwise ISB will exceed values given.  
2. Tested on a sample basis.  
3. 20 pF on CS, 70 pF all others.  
4
CYM1841A  
CYM1841B  
CYM1841C  
AC Test Loads and Waveforms  
R1481  
R1481  
ALL INPUT PULSES  
90%  
10%  
5V  
5V  
3.0V  
GND  
90%  
10%  
OUTPUT  
OUTPUT  
R2  
255  
R2  
255  
30 pF  
5 pF  
< 5ns  
< 5ns  
INCLUDING  
JIG AND  
SCOPE  
INCLUDING  
JIG AND  
SCOPE  
1841A4  
1841A5  
(a)  
(b)  
Equivalent to:  
THÉVENIN EQUIVALENT  
167  
OUTPUT  
1.73V  
5
CYM1841A  
CYM1841B  
CYM1841C  
[4]  
Switching Characteristics Over the Operating Range  
1841C-12  
Min. Max.  
1841B/C-15 1841A/B/C-20 1841A/B/C-25  
Parameter  
Description  
Min.  
15  
3
Max.  
Min.  
Max.  
Min.  
Max.  
Unit  
READ CYCLE  
t
t
t
t
t
t
t
t
t
t
Read Cycle Time  
12  
3
20  
25  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
RC  
Address to Data Valid  
Output Hold from Address Change  
CS LOW to Data Valid  
OE LOW to Data Valid  
OE LOW to Low Z  
12  
15  
20  
25  
AA  
3
3
OHA  
ACS  
DOE  
LZOE  
HZOE  
LZCS  
HZCS  
PD  
12  
7
15  
8
20  
13  
25  
15  
0
3
0
3
0
0
OE HIGH to High Z  
7
8
15  
15  
[5]  
CS LOW to Low Z  
10  
10  
[5, 6]  
CS HIGH to High Z  
7
8
20  
20  
20  
25  
CS HIGH to Power-Down  
12  
15  
[7]  
WRITE CYCLE  
t
t
t
t
t
t
t
t
t
t
Write Cycle Time  
12  
9
15  
10  
10  
0
20  
15  
18  
0
25  
20  
20  
0
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
WC  
CS LOW to Write End  
Address Set-Up to Write End  
Address Hold from Write End  
Address Set-Up to Write Start  
WE Pulse Width  
SCS  
AW  
9
0
HA  
2
2
2
2
SA  
10  
7
13  
8
15  
13  
2
20  
15  
2
PWE  
SD  
Data Set-Up to Write End  
Data Hold from Write End  
WE HIGH to Low Z  
1
1
HD  
0
0
0
0
LZWE  
HZWE  
[6]  
WE LOW to High Z  
0
5
0
7
0
15  
0
15  
Shaded areas contain preliminary information.  
Notes:  
4. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified  
OL/IOH and 30-pF load capacitance.  
I
5. At any given temperature and voltage condition, tHZCS is less than tLZCS for any given device. These parameters are guaranteed by design and not 100% tested.  
6. tHZCS and tHZWE are specified with CL = 5 pF as in part (b) of AC Test Loads and Waveforms. Transition is measured ±500 mV from steady-state voltage.  
7. The internal write time of the memory is defined by the overlap of CS LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can  
terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.  
6
CYM1841A  
CYM1841B  
CYM1841C  
[4  
Switching Characteristics Over the Operating Range  
1841A/B/C-35  
Min. Max.  
1841A/B/C-45  
Parameter  
Description  
Min.  
Max.  
Unit  
READ CYCLE  
t
t
t
t
t
t
t
t
t
t
Read Cycle Time  
35  
3
45  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
RC  
Address to Data Valid  
Data Hold from Address Change  
CS LOW to Data Valid  
OE LOW to Data Valid  
OE LOW to Low Z  
35  
45  
AA  
3
OHA  
ACS  
DOE  
LZOE  
HZOE  
LZCS  
HZCS  
PD  
35  
25  
45  
30  
0
0
OE LOW to High Z  
15  
15  
[5]  
CS LOW to Low Z  
10  
10  
[5, 6]  
CS HIGH to High Z  
20  
35  
20  
45  
CS HIGH to Power-Down  
[7]  
WRITE CYCLE  
t
t
t
t
t
t
t
t
t
t
Write Cycle Time  
35  
30  
30  
2
45  
40  
40  
2
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
WC  
CS LOW to Write End  
Address Set-Up to Write End  
Address Hold from Write End  
Address Set-Up to Write Start  
WE Pulse Width  
SCS  
AW  
HA  
2
2
SA  
30  
20  
2
35  
25  
2
PWE  
SD  
Data Set-Up to Write End  
Data Hold from Write End  
WE HIGH to Low Z  
HD  
0
0
LZWE  
HZWE  
[6]  
WE LOW to High Z  
0
15  
0
15  
7
CYM1841A  
CYM1841B  
CYM1841C  
Switching Waveforms  
[8, 9]  
Read Cycle No. 1  
t
RC  
ADDRESS  
t
AA  
t
OHA  
DATA OUT  
PREVIOUS DATA VALID  
DATA VALID  
1841A6  
[8, 10]  
Read Cycle No. 2  
t
CS  
RC  
t
ACS  
OE  
t
HZOE  
t
DOE  
t
HZCS  
t
LZOE  
HIGH  
IMPEDANCE  
HIGH IMPEDANCE  
DATA VALID  
DATA OUT  
t
1841A7  
LZCS  
[7]  
Write Cycle No. 1 (WE Controlled)  
t
WC  
ADDRESS  
t
SCS  
CS  
t
t
HA  
AW  
t
t
SA  
PWE  
WE  
t
t
HD  
SD  
DATA IN  
DATA VALID  
t
t
LZWE  
HZWE  
HIGH IMPEDANCE  
DATA OUT  
DATA UNDEFINED  
1841A8  
Notes:  
8. WE is HIGH for read cycle.  
9. Device is continuously selected, CS = VIL and OE= VIL  
10. Address valid prior to or coincident with CS transition LOW.  
.
8
CYM1841A  
CYM1841B  
CYM1841C  
Switching Waveforms (continued)  
[7, 11]  
Write Cycle No. 2 (CS Controlled)  
t
WC  
ADDRESS  
t
SA  
t
SCS  
CS  
t
t
HA  
AW  
t
PWE  
WE  
DATA IN  
t
t
HD  
SD  
DATA VALID  
t
HZWE  
HIGH IMPEDANCE  
DATA OUT  
DATA UNDEFINED  
1841A9  
Note:  
11. If CS goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.  
Truth Table  
CS  
H
L
WE  
X
OE  
X
Input/Output  
High Z  
Mode  
Deselect/Power-Down  
Read  
H
L
Data Out  
Data In  
High Z  
L
L
X
Write  
L
H
H
Deselect  
9
CYM1841A  
CYM1841B  
CYM1841C  
Ordering Information  
Speed  
Package  
Name  
Operating  
Range  
(ns)  
Ordering Code  
CYM1841CPM-12C  
CYM1841CP7-12C  
CYM1841CPZ-12C  
CYM1841APM15C  
CYM1841APY-15C  
CYM1841APT-15C  
CYM1841AP5-15C  
CYM1841AP6-15C  
CYM1841AP7-15C  
CYM1841AP8-15C  
CYM1841APN-15C  
CYM1841APR-15C  
CYM1841APZ-15C  
CYM1841BPZ-15C  
CYM1841BP7-15C  
CYM1841APM-20C  
CYM1841APY-20C  
CYM1841APT-20C  
CYM1841AP5-20C  
CYM1841AP6-20C  
CYM1841AP7-20C  
CYM1841AP8-20C  
CYM1841APN-20C  
CYM1841APR-20C  
CYM1841APZ-20C  
CYM1841BPZ-20C  
CYM1841BP7-20C  
CYM1841APM-25C  
CYM1841APY-25C  
CYM1841APT-25C  
CYM1841AP5-25C  
CYM1841AP6-25C  
CYM1841AP7-25C  
CYM1841AP8-25C  
CYM1841APN-25C  
CYM1841APR-25C  
CYM1841APZ-25C  
CYM1841BPZ-25C  
CYM1841BP7-25C  
Package Type  
64-Pin Plastic SIMM Module  
12  
PM02  
PM04  
PZ03  
PM02  
PM01  
PM01  
PN04  
PM01  
PM04  
PM04  
PN02  
PZ01  
PZ03  
PZ03  
PM04  
PM02  
PM01  
PM01  
PN04  
PM01  
PM04  
PM04  
PN02  
PZ01  
PZ03  
PZ03  
PM04  
PM02  
PM01  
PM01  
PN04  
PM01  
PM04  
PM04  
PN02  
PZ01  
PZ03  
PZ03  
PM04  
Commercial  
72-Pin Plastic SIMM Module  
64-Pin Plastic ZIP Module  
15  
20  
25  
64-Pin Plastic SIMM Module  
Commercial  
64-Pin Plastic SIMM Module (gold contacts)  
64-Pin Plastic SIMM Module  
72-Pin Plastic Angled SIMM Module  
72-Pin Plastic Angled SIMM Module (gold contacts)  
72-Pin Plastic SIMM Module  
72-Pin Plastic SIMM Module (gold contacts)  
64-Pin Plastic Angled SIMM Module  
64-Pin Plastic ZIP Module  
64-Pin Plastic ZIP Module  
64-Pin Plastic ZIP Module  
72-Pin Plastic SIMM Module  
64-Pin Plastic SIMM Module  
Commercial  
64-Pin Plastic SIMM Module (gold contacts)  
64-Pin Plastic SIMM Module  
72-Pin Plastic Angled SIMM Module  
72-Pin Plastic Angled SIMM Module (gold contacts)  
72-Pin Plastic SIMM Module  
72-Pin Plastic SIMM Module (gold contacts)  
64-Pin Plastic Angled SIMM Module  
64-Pin Plastic ZIP Module  
64-Pin Plastic ZIP Module  
64-Pin Plastic ZIP Module  
72-Pin Plastic SIMM Module  
64-Pin Plastic SIMM Module  
Commercial  
64-Pin Plastic SIMM Module (gold contacts)  
64-Pin Plastic SIMM Module  
72-Pin Plastic Angled SIMM Module  
72-Pin Plastic Angled SIMM Module (gold contacts)  
72-Pin Plastic SIMM Module  
72-Pin Plastic SIMM Module (gold contacts)  
64-Pin Plastic Angled SIMM Module  
64-Pin Plastic ZIP Module  
64-Pin Plastic ZIP Module  
64-Pin Plastic ZIP Module  
72-Pin Plastic SIMM Module  
Shaded areas contain preliminary information.  
10  
CYM1841A  
CYM1841B  
CYM1841C  
Ordering Information (continued)  
Speed  
(ns)  
Package  
Operating  
Range  
Ordering Code  
CYM1841APM-35C  
CYM1841APY-35C  
CYM1841APT-35C  
CYM1841AP5-35C  
CYM1841AP6-35C  
CYM1841AP7-35C  
CYM1841AP8-35C  
CYM1841APN-35C  
CYM1841APR-35C  
CYM1841APZ-35C  
CYM1841BPZ-35C  
CYM1841BP7-35C  
CYM1841APM-45C  
CYM1841APY-45C  
CYM1841APT-45C  
CYM1841AP5-45C  
CYM1841AP6-45C  
CYM1841AP7-45C  
CYM1841AP8-45C  
CYM1841APN-45C  
CYM1841APR-45C  
CYM1841APZ-45C  
CYM1841BPZ-45C  
CYM1841BP7-45C  
Name  
PM02  
PM01  
PM01  
PN04  
PM01  
PM04  
PM04  
PN02  
PZ01  
PZ03  
PZ03  
PM04  
PM02  
PM01  
PM01  
PN04  
PM01  
PM04  
PM04  
PN02  
PZ01  
PZ03  
PZ03  
PM04  
Package Type  
64-Pin Plastic SIMM Module  
35  
Commercial  
64-Pin Plastic SIMM Module (gold contacts)  
64-Pin Plastic SIMM Module  
72-Pin Plastic Angled SIMM Module  
72-Pin Plastic Angled SIMM Module (gold contacts)  
72-Pin Plastic SIMM Module  
72-Pin Plastic SIMM Module (gold contacts)  
64-Pin Plastic Angled SIMM Module  
64-Pin Plastic ZIP Module  
64-Pin Plastic ZIP Module  
64-Pin Plastic ZIP Module  
72-Pin Plastic SIMM Module  
45  
64-Pin Plastic SIMM Module  
Commercial  
64-Pin Plastic SIMM Module (gold contacts)  
64-Pin Plastic SIMM Module  
72-Pin Plastic Angled SIMM Module  
72-Pin Plastic Angled SIMM Module (gold contacts)  
72-Pin Plastic SIMM Module  
72-Pin Plastic SIMM Module (gold contacts)  
64-Pin Plastic Angled SIMM Module  
64-Pin Plastic ZIP Module  
64-Pin Plastic ZIP Module  
64-Pin Plastic ZIP Module  
72-Pin Plastic SIMM Module  
Document #: 38-M-00031-G  
11  
CYM1841A  
CYM1841B  
CYM1841C  
Package Diagrams  
64-Pin Plastic SIMM Module PM01  
0.125 DIA.  
+.001 2 PLCS  
3.845  
3.855  
0.330  
MAX  
3.580  
3.588  
0.525  
MAX  
0.400  
0.250  
0.145 REF  
0.050  
TYP  
0.62 R + .001  
0.250  
PIN 1  
0.080  
PIN 64  
3.35 (64 PINS)  
0.250  
V
64-Pin Plastic SIMM Module PM02  
0.125 DIA.  
+ .001 2 PLCS  
3.845  
3.855  
0.350  
MAX  
3.580  
3.588  
0.585  
0.595  
0.400  
0.250  
0.135 REF  
0.050  
TYP  
0.62 R + .001  
0.250  
PIN 1  
0.080  
PIN 64  
3.348  
(64 PINS)  
3.352  
0.250  
72-Pin Plastic SIMM Module PM04  
12  
CYM1841A  
CYM1841B  
CYM1841C  
Package Diagrams (continued)  
64-Pin Plastic Angled SIMM Module PN02  
3.845/3.855  
3.580/3.588  
.350MAX  
.670/.680  
.397/.403  
.245/.255  
.220REF  
.061/.063R  
PIN1  
.075/.085  
.050TYP  
.249/.251  
3.348/3.352  
.245/.255  
72-Pin Plastic Angled SIMM Module PN04  
64-Pin Plastic ZIP Module PZ01  
BottomView  
0.330  
MAX  
3.640  
3.660  
0.050  
0.050  
0.500  
MAX  
0.120  
0.150  
0.008  
0.014  
0.250  
TYP  
0.100  
TYP  
0.050  
TYP  
0.135  
0.165  
0.015  
0.025  
0.100  
TYP  
Pin 1  
DIMENSIONS IN INCHES  
MIN.  
MAX.  
13  
CYM1841A  
CYM1841B  
CYM1841C  
Package Diagrams (continued)  
64-Pin Plastic ZIP Module PZ03  
Bottom View  
0.350  
MAX  
3.640  
3.660  
0.050  
0.050  
0.575  
MAX  
0.120  
0.150  
0.250  
TYP  
0.100  
TYP  
0.050  
TYP  
0.135  
0.165  
0.015  
0.025  
0.100  
TYP  
Pin 1  
DIMENSIONSININCHES  
MIN.  
MAX.  
© Cypress Semiconductor Corporation, 2000. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use  
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize  
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress  
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.  
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