3.3V 168 pin Registered SDRAM Modules
HYS72V8200GR
HYS72V16200GR
HYS72V32200GR
HYS72V32220GR
HYS72V64200GR
HYS72V128220GR
64MB, 128MB, 256MB,
512MB & 1GB Densities
• 168 Pin JEDEC Standard, Registered 8 Byte Dual-In-Line SDRAM Module
for PC and Server main memory applications
• One bank 8M x 72, 16M x 72, 32M x 72 and 64M x 72 organisation
two bank 32M x 72 & 128M x 72 organisation
• Optimized for ECC applications with very low input capacitances
• JEDEC standard Synchronous DRAMs (SDRAM)
• Performance:
-8
-8B
Units
MHz
fCK
tCK
tAC
Clock frequency (max.)
Clock cycle time (min.)
Clock access time (min.)
100 100
10
10
ns
CAS latency = 3
CAS latency = 2
6
6
6
7
ns
ns
• Single +3.3V(± 0.3V ) power supply
• Programmable CAS Latency, Burst Length and Wrap Sequence
(Sequential & Interleave)
• Auto Refresh (CBR) and Self Refresh
• All inputs, outputs are LVTTL compatible
2
• Serial Presence Detect with E PROM
• Utilizes 64M & 256M SDRAMs in TSOPII-54 packages with registers and PLL.
The two bank module uses stacked TSOP54 packages
• 4096 refresh cycles every 64 ms
• Card Size: 133,35 mm x 38.1mm / 43.18mm x 4,00 / 6.50mm with Gold contact pads
• This specification largely follows the JEDEC STANDARD 21-C / Release 8 / Section 4.5.7
specification and as far as applicable - INTEL’s “PC SDRAM Registered DIMM Specification”
Rev.1.0 (Feb.98 and Rev.1.1 (Aug. 98).
Semiconductor Group
11
11.98
