HYS64D128021[E/H]BDL–[5/6]–C
Small-Outline DDR SDRAM Modules
Electrical Characteristics
Table 9
Electrical Characteristics and DC Operating Conditions
Parameter
Symbol
Values
Typ.
Unit Note/Test Condition 1)
Min.
Max.
8)
VI-Matching Pull-up
Current to Pull-down
Current
VIRatio
0.71
1.4
—
Input Leakage Current
II
–2
2
µA Any input 0 V ≤ VIN ≤ VDD;
All other pins not under test
= 0 V 9)
Output Leakage Current
IOZ
IOH
IOL
–5
5
µA DQs are disabled;
9)
0 V ≤ VOUT ≤ VDDQ
Output High Current,
Normal Strength Driver
—
–16.2
—
mA VOUT
=
1.95 V
Output Low
16.2
mA VOUT = 0.35 V
Current, Normal Strength
Driver
1) 0 °C ≤ TA ≤ 70 °C; VDDQ = 2.5 V ± 0.2 V, VDD = +2.5 V ± 0.2 V; VDDQ = 2.6 V ± 0.1 V, VDD = +2.6 V ± 0.1 V (DDR400);
2) DDR400 conditions apply for all clock frequencies above 166 MHz
3) Under all conditions, VDDQ must be less than or equal to VDD
.
4) Peak to peak AC noise on VREF may not exceed ± 2% VREF (DC). VREF is also expected to track noise variations in VDDQ
.
5) VTT is not applied directly to the device. VTT is a system supply for signal termination resistors, is expected to be set equal
to VREF, and must track variations in the DC level of VREF
6) Inputs are not recognized as valid until VREF stabilizes.
.
7) VID is the magnitude of the difference between the input level on CK and the input level on CK.
8) The ratio of the pull-up current to the pull-down current is specified for the same temperature and voltage, over the entire
temperature and voltage range, for device drain to source voltage from 0.25 to 1.0 V. For a given output, it represents the
maximum difference between pull-up and pull-down drivers due to process variation.
9) Values are shown per pin.
IDD Current Conditions and Specification
Table 10
IDD Conditions
Parameter
Symbol
Operating Current 0
IDD0
one bank; active/ precharge; DQ, DM, and DQS inputs changing once per clock cycle;
address and control inputs changing once every two clock cycles.
Operating Current 1
IDD1
one bank; active/read/precharge; Burst Length = 4; see component data sheet.
Precharge Power-Down Standby Current
all banks idle; power-down mode; CKE ≤ VIL,MAX
IDD2P
IDD2F
Precharge Floating Standby Current
CS ≥ VIH,,MIN, all banks idle; CKE ≥ VIH,MIN
;
address and other control inputs changing once per clock cycle; VIN = VREF for DQ, DQS and DM.
Precharge Quiet Standby Current
IDD2Q
CS ≥ VIHMIN, all banks idle; CKE ≥ VIH,MIN; VIN = VREF for DQ, DQS and DM;
address and other control inputs stable at ≥ VIH,MIN or ≤ VIL,MAX
.
Active Power-Down Standby Current
IDD3P
one bank active; power-down mode; CKE ≤ VILMAX; VIN = VREF for DQ, DQS and DM.
Data Sheet
19
Rev. 1.10, 2006-01
07192004-GJ3M-E2LD
